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[209.85.221.179]) by smtp.gmail.com with ESMTPSA id d9sm4391vko.15.2020.08.11.13.04.34 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 11 Aug 2020 13:04:35 -0700 (PDT) Received: by mail-vk1-f179.google.com with SMTP id s81so10906vkb.3 for ; Tue, 11 Aug 2020 13:04:34 -0700 (PDT) X-Received: by 2002:a1f:2fc1:: with SMTP id v184mr26376890vkv.42.1597176274522; Tue, 11 Aug 2020 13:04:34 -0700 (PDT) MIME-Version: 1.0 References: <1597058460-16211-1-git-send-email-mkshah@codeaurora.org> <1597058460-16211-2-git-send-email-mkshah@codeaurora.org> In-Reply-To: <1597058460-16211-2-git-send-email-mkshah@codeaurora.org> From: Doug Anderson Date: Tue, 11 Aug 2020 13:04:23 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v4 1/7] pinctrl: qcom: Add msmgpio irqchip flags To: Maulik Shah Cc: Bjorn Andersson , Marc Zyngier , LinusW , Stephen Boyd , Evan Green , Matthias Kaehlcke , LKML , linux-arm-msm , "open list:GPIO SUBSYSTEM" , Andy Gross , Thomas Gleixner , Jason Cooper , Rajendra Nayak , Lina Iyer , Srinivas Rao L Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Mon, Aug 10, 2020 at 4:21 AM Maulik Shah wrote: > > Add irqchip specific flags for msmgpio irqchip to mask non wakeirqs > during suspend and mask before setting irq type. > > Masking before changing type should make sure any spurious interrupt > is not detected during this operation. > > Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy") > Acked-by: Linus Walleij > Signed-off-by: Maulik Shah > --- > drivers/pinctrl/qcom/pinctrl-msm.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c > index a2567e7..90edf61 100644 > --- a/drivers/pinctrl/qcom/pinctrl-msm.c > +++ b/drivers/pinctrl/qcom/pinctrl-msm.c > @@ -1243,6 +1243,8 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl) > pctrl->irq_chip.irq_release_resources = msm_gpio_irq_relres; > pctrl->irq_chip.irq_set_affinity = msm_gpio_irq_set_affinity; > pctrl->irq_chip.irq_set_vcpu_affinity = msm_gpio_irq_set_vcpu_affinity; > + pctrl->irq_chip.flags = IRQCHIP_MASK_ON_SUSPEND > + | IRQCHIP_SET_TYPE_MASKED; > > np = of_parse_phandle(pctrl->dev->of_node, "wakeup-parent", 0); > if (np) { After taking Stephen's suggestion of improving the subject: Reviewed-by: Douglas Anderson