Received: by 2002:a05:6a10:a0d1:0:0:0:0 with SMTP id j17csp64987pxa; Tue, 11 Aug 2020 17:29:16 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyTW3O6kswnECi1Y2jMF9IUwUPBttHPRL9khWFkXFqtEoebkVLwQCf24XwyH6LthqN/sIb2 X-Received: by 2002:a17:906:b213:: with SMTP id p19mr14073665ejz.39.1597192156110; Tue, 11 Aug 2020 17:29:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1597192156; cv=none; d=google.com; s=arc-20160816; b=xYJ16eYCUjtABOhyCeRLWiMbdU5FR6MGNbA8zQ7/O3qFwckUycHqFXafBBd97LC0ab P9cp0rm5KmhrG/6gqeOxIaG7MGDHD+bKZKAF7iOqFrHqAmB67/hwy17kXBiPSNqd0zvg ul23XfcYL9GXg4bn4peLBIEHKYhTMOgh8FysSA3tdfGdR7/Y62Ttltd3cor5KKbVATdK p8psXyJdtlv2koCJ8Oo2OgyS1M70kgJg/GD9HkOMj0hZEErRGul5j3cIM+ljTufmown5 PKBn4TUr3yrNakYAAJFMO2Qk5U4MUmSv4jpyG18IVUAUeCrJxaKO6JbPjx9pX2173mCZ /q/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:dkim-signature:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from; bh=5U56MbpoGgbizDY87xBQZF5BWeIIcAyUuev+l62V8Co=; b=DI7yvNd4bMrwsFoz0/Sw/5Ur+SP1ZhKLCULZiqL4X54Ee9FZ4gK/eiRYM3djFds5Nb z8y1wppCe5xTmEXBQ9davreFz9+sn/QVnkuVL0Ft4EHcQW4MxwxF4TXbbySUDc7kYo6z uivbkzsOLhEkjey0U14ein0tiH6/Y+mjxFpLbeHiEUHc/ziSepJ+Jbq/5ye5qdb8aTAl dPEDBUTon9WeV4pkKqRcCegqctKPMyuv3k1khJNAIeyVJWYrXHxrV3mmrbCkM8ZY9JsP lCpcs02/E2r3uK/T5ACzMLwqSblt92TiJmzgIu8i+GKS7sE2J5Xr3OW5PUndWf1X516k 3qug== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=R90rGV1v; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id c34si281937edd.267.2020.08.11.17.28.51; Tue, 11 Aug 2020 17:29:16 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=R90rGV1v; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726592AbgHLA1w (ORCPT + 99 others); Tue, 11 Aug 2020 20:27:52 -0400 Received: from hqnvemgate26.nvidia.com ([216.228.121.65]:16782 "EHLO hqnvemgate26.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726472AbgHLA1t (ORCPT ); Tue, 11 Aug 2020 20:27:49 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate26.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Tue, 11 Aug 2020 17:27:34 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 11 Aug 2020 17:27:47 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 11 Aug 2020 17:27:47 -0700 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 12 Aug 2020 00:27:47 +0000 Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Wed, 12 Aug 2020 00:27:47 +0000 Received: from skomatineni-linux.nvidia.com (Not Verified[10.2.172.8]) by rnnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Tue, 11 Aug 2020 17:27:47 -0700 From: Sowjanya Komatineni To: , , , , , , , CC: , , , , , Subject: [PATCH v10 03/10] media: tegra-video: Update format lookup to offset based Date: Tue, 11 Aug 2020 17:27:14 -0700 Message-ID: <1597192041-16949-4-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1597192041-16949-1-git-send-email-skomatineni@nvidia.com> References: <1597192041-16949-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1597192054; bh=5U56MbpoGgbizDY87xBQZF5BWeIIcAyUuev+l62V8Co=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=R90rGV1vTxPHZ9pSzr5evWIalRkArum2d87Otv+77g4ENKFYPHoq8a7uJ1X5/xKwx SH9PAJWf/RSzvxmesVKxXReNStGK2GqGnPykcpbr+/UgYgFRK7BM7s8UVFU26hRi3n fqKrexjf9VkPSqRT78u3pVI/eEQJBcw7ErNjFMdVczMjrOzmFxwgR7Gmecz3rO7Jkx gqRTUvYIYBxWBBEMSRJSRNLaJvjnRGdsP7IVTyCPZOdtEjBh0hinXBpbeL5KpVcmr5 c3VazkIeAChpDkbkL822cpzM31EqkIOmK/sTeXt4RWilOludCmLmi7BwOayNDSh/Si z96sEhxAndDig== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Tegra VI supported video formats are more for non TPG and there can be multiple pixel formats for the same media bus format. This patch updates the helper function for format lookup based on mbus code from pre-defined Tegra supported format list to look from the specified list index offset. Offset based look up is used with sensor device graph (non TPG) where format enumeration can list all supported formats for the specific sensor mbus codes. Signed-off-by: Sowjanya Komatineni --- drivers/staging/media/tegra-video/vi.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 0197f4e..52d751f 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -53,11 +53,12 @@ to_tegra_channel_buffer(struct vb2_v4l2_buffer *vb) } static int tegra_get_format_idx_by_code(struct tegra_vi *vi, - unsigned int code) + unsigned int code, + unsigned int offset) { unsigned int i; - for (i = 0; i < vi->soc->nformats; ++i) { + for (i = offset; i < vi->soc->nformats; ++i) { if (vi->soc->video_formats[i].code == code) return i; } @@ -598,11 +599,12 @@ static void vi_tpg_fmts_bitmap_init(struct tegra_vi_channel *chan) bitmap_zero(chan->tpg_fmts_bitmap, MAX_FORMAT_NUM); index = tegra_get_format_idx_by_code(chan->vi, - MEDIA_BUS_FMT_SRGGB10_1X10); + MEDIA_BUS_FMT_SRGGB10_1X10, 0); bitmap_set(chan->tpg_fmts_bitmap, index, 1); index = tegra_get_format_idx_by_code(chan->vi, - MEDIA_BUS_FMT_RGB888_1X32_PADHI); + MEDIA_BUS_FMT_RGB888_1X32_PADHI, + 0); bitmap_set(chan->tpg_fmts_bitmap, index, 1); } -- 2.7.4