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[83.49.60.88]) by smtp.gmail.com with ESMTPSA id m16sm2149945wrr.71.2020.08.11.23.31.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Aug 2020 23:31:34 -0700 (PDT) From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= To: f.fainelli@gmail.com, robh+dt@kernel.org, tsbogend@alpha.franken.de, jonas.gorski@gmail.com, bcm-kernel-feedback-list@broadcom.com, linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Subject: [PATCH 02/14] mips: bmips: add BCM3368 irq definitions Date: Wed, 12 Aug 2020 08:31:17 +0200 Message-Id: <20200812063129.361862-3-noltari@gmail.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200812063129.361862-1-noltari@gmail.com> References: <20200812063129.361862-1-noltari@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add header with BCM3368 definitions in order to be able to include it from device tree files. Signed-off-by: Álvaro Fernández Rojas --- .../bcm3368-interrupt-controller.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 include/dt-bindings/interrupt-controller/bcm3368-interrupt-controller.h diff --git a/include/dt-bindings/interrupt-controller/bcm3368-interrupt-controller.h b/include/dt-bindings/interrupt-controller/bcm3368-interrupt-controller.h new file mode 100644 index 000000000000..e269c1bb93ea --- /dev/null +++ b/include/dt-bindings/interrupt-controller/bcm3368-interrupt-controller.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM3368_H +#define __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM3368_H + +#define BCM3368_IRQ_TIMER 0 +#define BCM3368_IRQ_SPI 1 +#define BCM3368_IRQ_UART0 2 +#define BCM3368_IRQ_UART1 3 +#define BCM3368_IRQ_ENET1 6 +#define BCM3368_IRQ_ENET0 8 +#define BCM3368_IRQ_ENET_PHY 9 +#define BCM3368_IRQ_ENET0_RX_DMA 15 +#define BCM3368_IRQ_ENET0_TX_DMA 16 +#define BCM3368_IRQ_ENET1_RX_DMA 17 +#define BCM3368_IRQ_ENET1_TX_DMA 18 +#define BCM3368_IRQ_PCI 31 + +#endif /* __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM3368_H */ -- 2.28.0