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Subject: Re: [PATCH v8 0/3] drm: Add support for Cadence MHDP DPI/DP bridge
 and J721E wrapper.
To:     =?UTF-8?Q?Guido_G=c3=bcnther?= <agx@sigxcpu.org>,
        Swapnil Jakhade <sjakhade@cadence.com>
CC:     <airlied@linux.ie>, <daniel@ffwll.ch>,
        <Laurent.pinchart@ideasonboard.com>, <robh+dt@kernel.org>,
        <a.hajda@samsung.com>, <narmstrong@baylibre.com>,
        <jonas@kwiboo.se>, <jernej.skrabec@siol.net>,
        <dri-devel@lists.freedesktop.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <mparab@cadence.com>,
        <yamonkar@cadence.com>, <praneeth@ti.com>, <nsekhar@ti.com>,
        <jsarha@ti.com>, <sandor.yu@nxp.com>
References: <1596713672-8146-1-git-send-email-sjakhade@cadence.com>
 <20200812083937.GA8816@bogon.m.sigxcpu.org>
From:   Tomi Valkeinen <tomi.valkeinen@ti.com>
Message-ID: <3bcbbb0b-ee04-0f1e-6c54-97b01c552d82@ti.com>
Date:   Wed, 12 Aug 2020 13:47:42 +0300
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Hi Guido,

On 12/08/2020 11:39, Guido Günther wrote:
> Hi,
> On Thu, Aug 06, 2020 at 01:34:29PM +0200, Swapnil Jakhade wrote:
>> This patch series adds new DRM bridge driver for Cadence MHDP DPI/DP
>> bridge. The Cadence Display Port IP is also referred as MHDP (Mobile High
>> Definition Link, High-Definition Multimedia Interface, Display Port).
>> Cadence Display Port complies with VESA DisplayPort (DP) and embedded
>> Display Port (eDP) standards.
> 
> Is there any relation to the cadence mhdp ip core used inthe imx8mq:
> 
>     https://lore.kernel.org/dri-devel/cover.1590982881.git.Sandor.yu@nxp.com/
> 
> It looks very similar in several places so should that use the same driver?
> Cheers,
>  -- Guido

Interesting.

So the original Cadence DP patches for TI SoCs did create a common driver with Rockchip's older mhdp
driver. And looks like the IMX series points to an early version of that patch ("drm/rockchip:
prepare common code for cdns and rk dpi/dp driver").

We gave up on that as the IPs did have differences and the firmwares used were apparently quite
different. The end result was very difficult to maintain, especially as (afaik) none of the people
involved had relevant Rockchip HW.

The idea was to get a stable DP driver for TI SoCs ready and upstream, and then carefully try to
create common parts with Rockchip's driver in small pieces.

If the Rockchip and IMX mhdp have the same IP and same firmware, then they obviously should share
code as done in the series you point to.

Perhaps Cadence can clarify the differences between IMX, TI and Rockchip IPs and FWs?

I'm worried that if there are IP differences, even if not great ones, and if the FWs are different
and developed separately, it'll be a constant "fix X for SoC A, and accidentally break Y for SoC B
and C", especially if too much code is shared.

In the long run I'm all for a single driver (or large shared parts), but I'm not sure if we should
start with that approach.

 Tomi

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