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From:   =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= <f4bug@amsat.org>
Date:   Wed, 12 Aug 2020 15:05:24 +0200
Message-ID: <CAAdtpL6eiXff38r-e1EtKDsx34mYS2eV0fxw=tXPPCbw1S5ZAw@mail.gmail.com>
Subject: Re: [PATCH v4 3/5] MIPS: BCM63xx: enable EHCI for DWV-S0 board
To:     =?UTF-8?B?w4FsdmFybyBGZXJuw6FuZGV6IFJvamFz?= <noltari@gmail.com>
Cc:     Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
        Florian Fainelli <f.fainelli@gmail.com>,
        Jonas Gorski <jonas.gorski@gmail.com>,
        bcm-kernel-feedback-list <bcm-kernel-feedback-list@broadcom.com>,
        "open list:BROADCOM NVRAM DRIVER" <linux-mips@vger.kernel.org>,
        Linux ARM <linux-arm-kernel@lists.infradead.org>,
        open list <linux-kernel@vger.kernel.org>
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On Wed, Aug 12, 2020 at 9:53 AM Álvaro Fernández Rojas
<noltari@gmail.com> wrote:
>
> BCM6358 SoCs have OHCI and EHCI controllers that share the same USB ports.
> Therefore, the board should also have EHCI enabled.
>
> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
> Acked-by: Florian Fainelli <f.fainelli@gmail.com>

v3 already reviewed, again:
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> ---
>  v4: no changes.
>  v3: Reword commit description to avoid possible confusions.
>  v2: no changes.
>
>  arch/mips/bcm63xx/boards/board_bcm963xx.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
> index 45f1bc437245..ac9570b66f37 100644
> --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
> +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
> @@ -645,6 +645,7 @@ static struct board_info __initdata board_DWVS0 = {
>         },
>
>         .has_ohci0                      = 1,
> +       .has_ehci0                      = 1,
>  };
>  #endif /* CONFIG_BCM63XX_CPU_6358 */
>
> --
> 2.28.0
>