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([2001:b07:6468:f312:fcdc:39e8:d361:7e30]) by smtp.gmail.com with ESMTPSA id k204sm3938274wma.21.2020.08.12.06.04.44 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 12 Aug 2020 06:04:45 -0700 (PDT) Subject: Re: [PATCH] KVM: x86/pmu: Add '.exclude_hv = 1' for guest perf_event To: like.xu@intel.com, peterz@infradead.org Cc: Like Xu , Yao , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Arnaldo Carvalho de Melo , Mark Rutland References: <20200812050722.25824-1-like.xu@linux.intel.com> <5c41978e-8341-a179-b724-9aa6e7e8a073@redhat.com> <20200812111115.GO2674@hirez.programming.kicks-ass.net> <65eddd3c-c901-1c5a-681f-f0cb07b5fbb1@redhat.com> From: Paolo Bonzini Message-ID: <8bdc60d5-c9ef-4e8f-6b73-b7bd012d9d30@redhat.com> Date: Wed, 12 Aug 2020 15:04:44 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.9.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12/08/20 14:56, Xu, Like wrote: > > My proposal is to define: > the "hypervisor privilege levels" events in the KVM/x86 context as > all the host kernel events plus /dev/kvm user space events. What are "/dev/kvm user space events"? In any case, this patch should be included only in the series that adds exclude_hv support in arch/x86. Paolo > If we add ".exclude_hv = 1" in the pmc_reprogram_counter(), > do you see any side effect to cover the above usages? > > The fact that exclude_hv has never been used in x86 does help > the generic perf code to handle permission checks in a more concise way.