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Thu, 13 Aug 2020 08:47:02 +0000 From: Oliver Graute To: aisheng.dong@nxp.com Cc: fabio.estevam@nxp.com, kernel@pengutronix.de, linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, Oliver Graute , Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC] arm64: dts: imx8qm: added lvds pwm Date: Thu, 13 Aug 2020 10:45:45 +0200 Message-Id: <20200813084547.20875-1-oliver.graute@kococonnector.com> X-Mailer: git-send-email 2.17.1 Content-Type: text/plain X-ClientProxiedBy: AM0PR03CA0018.eurprd03.prod.outlook.com (2603:10a6:208:14::31) To AM0PR09MB4067.eurprd09.prod.outlook.com (2603:10a6:208:194::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost (2.207.138.2) by AM0PR03CA0018.eurprd03.prod.outlook.com (2603:10a6:208:14::31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3283.16 via Frontend Transport; Thu, 13 Aug 2020 08:47:02 +0000 X-Mailer: git-send-email 2.17.1 X-Originating-IP: [2.207.138.2] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e9b635ae-2805-40c2-2b89-08d83f6572f0 X-MS-TrafficTypeDiagnostic: AM0PR09MB4276: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:3383; 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But without success. I'am running into this issue: [ 0.858737] lcd0-pwm0: failed to power up resource 188 ret -22 Can you review and comment please? This patch is based on your patch series. Best regards, Oliver --- arch/arm64/boot/dts/freescale/imx8qm.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi index fd0e706ea011..cf9aea4b26f4 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi @@ -137,6 +137,22 @@ hsio: hsio@5f080000 { reg = <0x0 0x5f080000 0x0 0xF0000>; /* lpcg, csr, msic, gpio */ }; + + lvds1_pwm: pwm@57244000 { + compatible = "fsl,imx8qm-pwm", "fsl,imx27-pwm"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x57244000 0x1000>; + clocks = <&pwm0_lpcg IMX_LPCG_CLK_4>, + <&pwm0_lpcg IMX_LPCG_CLK_0>; + clock-names = "ipg", "per"; + assigned-clocks = <&clk IMX_SC_R_PWM_0 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <24000000>; + #pwm-cells = <2>; + power-domains = <&pd IMX_SC_R_LVDS_1_PWM_0>; + status = "disabled"; + }; + pmu { compatible = "arm,armv8-pmuv3"; interrupts = ; -- 2.26.0