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[23.128.96.18]) by mx.google.com with ESMTP id v18si3517755ejb.407.2020.08.13.08.44.45; Thu, 13 Aug 2020 08:45:07 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726898AbgHMPl3 (ORCPT + 99 others); Thu, 13 Aug 2020 11:41:29 -0400 Received: from mout.kundenserver.de ([212.227.126.131]:48215 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726679AbgHMPl2 (ORCPT ); Thu, 13 Aug 2020 11:41:28 -0400 Received: from mail-qt1-f173.google.com ([209.85.160.173]) by mrelayeu.kundenserver.de (mreue009 [212.227.15.129]) with ESMTPSA (Nemesis) id 1MLz3R-1kNV7k1PST-00I0Ew for ; Thu, 13 Aug 2020 17:41:25 +0200 Received: by mail-qt1-f173.google.com with SMTP id v22so4676395qtq.8 for ; Thu, 13 Aug 2020 08:41:25 -0700 (PDT) X-Gm-Message-State: AOAM53023WOGA20bLKlx8JzwlZi4H5vsQEziMk+7XuJPCb8Xla85bUfB 5fXQpCFBzAg1bhq/3K2EJUkbi4mmNxK2zoyiw1U= X-Received: by 2002:ac8:688e:: with SMTP id m14mr5976151qtq.7.1597333284188; Thu, 13 Aug 2020 08:41:24 -0700 (PDT) MIME-Version: 1.0 References: <20200804135817.5495-1-daniel.gutson@eclypsium.com> In-Reply-To: From: Arnd Bergmann Date: Thu, 13 Aug 2020 17:41:07 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] mtd: spi-nor: intel-spi: Do not try to make the SPI flash chip writable To: Daniel Gutson Cc: Tudor Ambarus , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Mika Westerberg , Boris Brezillon , linux-mtd , "linux-kernel@vger.kernel.org" , Alex Bazhaniuk , Richard Hughes , Greg Kroah-Hartman Content-Type: text/plain; charset="UTF-8" X-Provags-ID: V03:K1:yYRwo/T7qD5jYkdy4a4BA5kceI6rHyB7iJnj7QET+1JZfQPqIPd whRpw9kNzk9hZ5+4NwVVu2HnQpEwj8xJLMnPiw/SSjE8dBLdYzpyUoGy/E+zBFb6SQTxqX/ A1uSgaWhBWkAv3RcF78ImeaGfX3pDuDvn+eA3GZTE3CADBSfFvn5QvCOS7TbC5bY+qxl2Y5 cGQUYladuMXCxqBxnAUpQ== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1;V03:K0:PHUbVkQMu1o=:i1hoozi4LG1fQla+wh3QmW X6USbcd9AVhYFb+er0NiUG3zvfC4MeR6bpFXc8cZBwDqVYFpm3WMiMuTLV5G1p5prKxPc0Cwe FJfDNTj0B1GVvIlsZP3TjQrwmj2fLWKOlEWTWRfFsmt9P+yP2yseeI0x9EZVLwo9Cxre+Kuht csmdtRzXEmrni8cY6oUaQ0piNPsUnMhOQrD0UA5yk10wU5/5cRFbqx1PUgEPqxDVrHMoCauXg skHScRMZpQSs1+kf6D02r1F6iq4/ZzAbJxVXLlxFWN2eiZB0q9ltMhkTyPqlf1dJ+txezHc6F jlVtpYmwKCX/YgUhCcXi5Q2/y2afUkTqi/16N/zDwktUn06MINUzMzr6xBqFHSikN1NQDXxkt w702iE/n10S2BvSbBDeZz75S+zJ3eeUh+I6TRvZZEsYLyWajngPw60jvk2ZcCT+e1NV+d6vTx a8K+E9+fDb8Y+VZIysEKB/shAfyDgYr6d3ns07kR7KQnbLaZ3I9IC93VP9ogG5c/6tx6Rza5H 4MJcxTa/u7ECUAsylVWzGO5OLg3DRiUvGfWF4pVcHilaopwqSD4Z9bfd41987LHFGKhLZrAsU NTJynTBo03ZDgrItL/Mx5C/E14graWqeShHvbMU7Dz7FDfro5+e1ggl5eVpcwgBDXEb7EGje6 aBFGr39V2F3SoPFUej9yay7nvEi3We+MrrAXD5Wz1PUqB8PwHlrp/PewQ6LP8ixgRuEmB2BXl 76DyX3rUv8NkdndPet6scXAn9jIzAY3E8b2xZklGFt0Ahyh6fDsybfbIAmWtxFkRa9tZ9yq35 OJl41cm9IaC4cY7qc+HO7l20kElgvzWeUk+wERJHfPHTtf3Y81xyLX5m6GebdVvMNrAh/aG Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Aug 4, 2020 at 11:26 PM Daniel Gutson wrote: > On Tue, Aug 4, 2020 at 5:46 PM Arnd Bergmann wrote: > > > But wait, Mika, the author of the file, asked earlier not to remove > > > the module parameter of intel-spi, and just remove the unconditional > > > attempt to turn the chip writable in intle-spi-pci. > > > > Yes, and I think that is fine (aside from the inconsistency with bay trail > > that you have not commented on), > > There are two inconsistencies before any of my patches: > 1) in intel-spi.c: uses the module parameter only for bay trail. > 2) intel-spi.c uses a module parameter whereas intel-spi-pci doesn't Neither of these matches what I see in the source code. Please check again. Once more: intel-spi.c has a module parameter that controls writing to the device regardless of the back-end (platform or pci), purely in software. The hardware write-protect setting where available works in addition that and prevents writing even if the module parameter is set to writeable. > > but that only touches the hardware > > write-protection, which doesn't really have any effect unless user > > space also configures the driver module to allow writing to the > > mtd device. > > > > > So I'm not touching intel-pci, just removing that code from > > > intel-spi-pci without adding a new module parameter. > > > > > > Are you aligned on this? > > > > One of us is still very confused about what the driver does. > > You seem to have gone back to saying that without the > > change a user could just write to the device even without > > passing the module parameter to intel-spi.ko? > > What I'm trying to say is that, if the BIOS is unlocked > (no driver involvement here), the intel-spi-pci turns the > chip writable even without changing the module parameter of intel-spi. > This is because the attempt to turn the chip writable occurs in > the probing of intel-spi-pci, that is, earlier than the intel-spi > initialization. My question was why you even care whether the hardware bit is set to writeable if the driver disallows writing. I think the answer is that you misread the driver. Arnd