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[23.128.96.18]) by mx.google.com with ESMTP id i9si4328568edy.464.2020.08.13.18.07.40; Thu, 13 Aug 2020 18:08:04 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=m22omvMN; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726604AbgHNBHN (ORCPT + 99 others); Thu, 13 Aug 2020 21:07:13 -0400 Received: from Mailgw01.mediatek.com ([1.203.163.78]:63989 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726578AbgHNBHN (ORCPT ); Thu, 13 Aug 2020 21:07:13 -0400 X-UUID: 2aec9d0462b540bba304e8f40e82407f-20200814 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; bh=Qe393WeyTwpJe6c+m7yD4MABNjEKDyOFUs589c8xpVc=; b=m22omvMNlQcaTfLekQRUp2pDHJiZJKV990PLTFjzvq7GJFMhoiMxS3Df6L3t+lq1cS8+6kABz7Gb4C7alcQrKiuLXfkZ7XAiy7NI7ZcaLugjArqhbh5UyRAmkzEik7SJlkGRUU0+SqgJBRBx+kKYiDNdE+K0BIdCQcV+kiXkBlw=; X-UUID: 2aec9d0462b540bba304e8f40e82407f-20200814 Received: from mtkcas32.mediatek.inc [(172.27.4.253)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 1793749347; Fri, 14 Aug 2020 09:07:04 +0800 Received: from MTKCAS32.mediatek.inc (172.27.4.184) by MTKMBS31N1.mediatek.inc (172.27.4.69) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 14 Aug 2020 09:06:59 +0800 Received: from [10.17.3.153] (10.17.3.153) by MTKCAS32.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 14 Aug 2020 09:07:01 +0800 Message-ID: <1597367164.5891.6.camel@mhfsdcap03> Subject: Re: [v4,0/3] mmc: mediatek: add optional reset property mmc: mediatek: add optional module reset property arm64: dts: mt7622: add reset node for mmc device Documentation/devicetree/bindings/mmc/mtk-sd.txt | 2 ++ arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 ++ drivers/mmc/host/mtk-sd.c | 13 +++++++++++++ 3 files changed, 17 insertions(+) From: Wenbin Mei To: Matthias Brugger CC: Ulf Hansson , Rob Herring , Chaotian Jing , Philipp Zabel , , , , , , Date: Fri, 14 Aug 2020 09:06:04 +0800 In-Reply-To: <195c7bfc-38e4-8d5e-af79-cc3f00b552a4@gmail.com> References: <20200813090618.28009-1-wenbin.mei@mediatek.com> <195c7bfc-38e4-8d5e-af79-cc3f00b552a4@gmail.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: 34F81C7A311781AC5641DD657E0C145749994F76CA7B06A56DF2404E414FD9C52000:8 X-MTK: N Content-Transfer-Encoding: base64 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org U29ycnkgZm9yIHRoZSBpbmNvbnZlbmllbmNlLCB0aGVyZSBpcyBubyBjaGFuZ2VzIGJldHdlZW4g VjMgYW5kIFY0LCBWMw0KaXMgd3Jvbmcgd2l0aCBteSBzdWJqZWN0IGxpbmUsIGFuZCBWNCBmaXgg aXQuDQpPbiBUaHUsIDIwMjAtMDgtMTMgYXQgMTU6NTQgKzAyMDAsIE1hdHRoaWFzIEJydWdnZXIg d3JvdGU6DQo+IEl0IHdvdWxkIGJlIGdvb2QgdG8gcHJvdmlkZSBhIGxpc3Qgb2YgdGhlIGNoYW5n ZXMsIHNvIHRoYXQgb25lIGNhbiBlYXNpbHkgDQo+IHVuZGVyc3RhbmQgd2hhdCdzIHRoZSBkaWZm ZXJlbmNlIGJldHdlZW4gdjMgYW5kIHY0LiBPbiBhIHF1aWNrIGdsaW1wc2UgSSBkaWRuJ3QgDQo+ IHNlZSBhbnkgY2hhbmdlcy4NCj4gDQo+IFJlZ2FyZHMsDQo+IE1hdHRoaWFzDQo+IA0KPiBPbiAx My8wOC8yMDIwIDExOjA2LCBXZW5iaW4gTWVpIHdyb3RlOg0KPiA+IC0tDQo+ID4gMi4xOC4wDQo+ ID4gDQoNCg==