Received: by 2002:a05:6a10:a0d1:0:0:0:0 with SMTP id j17csp2795025pxa; Mon, 17 Aug 2020 20:29:38 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwkYBWSHqebSL05IUXndLFhHrag38aouBL9P87teyGESVPHIqWWczv3l0yKHiKDzlMrbVe/ X-Received: by 2002:a50:f687:: with SMTP id d7mr18120899edn.306.1597721378020; Mon, 17 Aug 2020 20:29:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1597721378; cv=none; d=google.com; s=arc-20160816; b=OhqozVdYQxNpRgAw/XSZfM1NmWo4KkwmbLCWHdUBeaj9Ix7IClmc6abXapgt84hOQ9 HCwcdwxR05wxXO/uUOrw/9i/Yoqt4wXCV8dWYcxxiIxA5i3uCi7srA4C1i35aT9D/tVA ToBuEUqCzpNiTKXUhQr1MEW//LS7RQg3AIIhv+3KP4NTN+tO+3g6BeX5LssGQ469PglY Xv2ui1Gb5yk85i4UCTEGECHwCXRRrclEti2uiKtU0ugy5YTZ861oa8mqrBpUaeXbvqq/ ksKqQDn/FcR7p1h7pBsu6T5cVJv0jGwFRnTBOgYBwcBXM+w6TzLGmjsWnKwOSmIr2DUR O6gA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=u2Mb/MHhbgkVZBzn47GVJ6U/tlQFf5ktIWvnJGabsGM=; b=iUnYic/fv0XJFUImzg/MF37ffvTWYmS3nDT1ZQVmkt9qEjjQlocff87qOJw9w6D12X 58fGYVytl6opVVXep3xy1TiI6huPjUVrZ2Pnxj20Al9/eINNDoy0PiXaJRSpDB+16eRJ /L/3gXG6aHpn9miwheqbx6wZB2LuuhtW3cdM1E+sYQcO+n6CGlEX5BE5G4jpa2RecEFo Oo4s00aJC+rrnYlcF+BTfa3VTuAFC5vR9vL/HwV59MR3z4tDkNykemWbe5Fg2ICW+34Z aL2NkFh43ywHe2/ueuQgL6kJF/iq5nsPXSu8nt6qN2kiX7QSh4gQgjKIwv3zVBt2zf6d X76Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id 89si12642963edr.198.2020.08.17.20.29.14; Mon, 17 Aug 2020 20:29:38 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726632AbgHRD23 (ORCPT + 99 others); Mon, 17 Aug 2020 23:28:29 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:9826 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726422AbgHRD22 (ORCPT ); Mon, 17 Aug 2020 23:28:28 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 65EAAF6D45FC0316F09F; Tue, 18 Aug 2020 11:28:25 +0800 (CST) Received: from DESKTOP-5IS4806.china.huawei.com (10.174.187.22) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Tue, 18 Aug 2020 11:28:17 +0800 From: Keqian Zhu To: , , , CC: Marc Zyngier , Steven Price , "Andrew Jones" , Catalin Marinas , "Will Deacon" , James Morse , Suzuki K Poulose , , Keqian Zhu Subject: [PATCH v2 1/2] clocksource: arm_arch_timer: Use stable count reader in erratum sne Date: Tue, 18 Aug 2020 11:28:13 +0800 Message-ID: <20200818032814.15968-2-zhukeqian1@huawei.com> X-Mailer: git-send-email 2.8.4.windows.1 In-Reply-To: <20200818032814.15968-1-zhukeqian1@huawei.com> References: <20200818032814.15968-1-zhukeqian1@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.174.187.22] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In commit 0ea415390cd3 ("clocksource/arm_arch_timer: Use arch_timer_read_counter to access stable counters"), we separate stable and normal count reader to omit unnecessary overhead on systems that have no timer erratum. However, in erratum_set_next_event_tval_generic(), count reader becomes normal reader. This converts it to stable reader. Fixes: 0ea415390cd3 ("clocksource/arm_arch_timer: Use arch_timer_read_counter to access stable counters") Signed-off-by: Keqian Zhu --- drivers/clocksource/arm_arch_timer.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 6c3e841..777d38c 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -396,10 +396,10 @@ static void erratum_set_next_event_tval_generic(const int access, unsigned long ctrl &= ~ARCH_TIMER_CTRL_IT_MASK; if (access == ARCH_TIMER_PHYS_ACCESS) { - cval = evt + arch_counter_get_cntpct(); + cval = evt + arch_counter_get_cntpct_stable(); write_sysreg(cval, cntp_cval_el0); } else { - cval = evt + arch_counter_get_cntvct(); + cval = evt + arch_counter_get_cntvct_stable(); write_sysreg(cval, cntv_cval_el0); } -- 1.8.3.1