Received: by 2002:a05:6a10:a0d1:0:0:0:0 with SMTP id j17csp704135pxa; Wed, 19 Aug 2020 12:29:50 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxzPWsXC//JWKBVhVWUffWXYGT54jeYYcrAkMGPjM2Qnbp+guZ5PI6Bld7Wu8ArOMvKbTHa X-Received: by 2002:aa7:cd04:: with SMTP id b4mr25342213edw.254.1597865390591; Wed, 19 Aug 2020 12:29:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1597865390; cv=none; d=google.com; s=arc-20160816; b=k/nla0JIurSoyTIuZHazdtdKoVX4FDCVom+o+UOCudNNNwg9BHDG14Y+lRGH+ZFBOC 28HtvlcsuplXpJv9j9iE6idu3rDNgQ5Cs+hzaddWFr8qoJv2acwVOLRzINNlOSNW5thy 4UHfbcMuynvbHCzqbFtT2apoL8jQhsCy1ap3co/h9RsZY2H6c8f0/Ou3zXPnI0238gBe wtWna9gVcghDcXwr0lWMyPEOexf/iBrLm5uwHFMxR7YO0DeJZz7Zmyp/ODIufWHn7rxS 0K6r+qeeQcFsN6Gvl9D/ctkf2VH1ryRcG8/SXi4Jg+gVLwGxZa4R6BIJCotb0tUP6XZS ymaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:dkim-signature; bh=Y5BGtZ5BwqTPokae+tJqoDxjKYZ/7jxyi3A6FMN4E2E=; b=hkLUVC7D98DoVdEnqk0JPfmlpQS1ta+mdf8NGJgS4+v3qd8ErGiOcGB66C4TAvfeo9 f9/AT26uNDGx47XQ3HQqvIO3mzshe4W1tEin68MhB2GR22ZASulQDUmZyN/MBdNhtYZ+ QKmeIA1m5qNMDgbgnSqwh3W+dqR9eXx1fjMn9/pNdxSTO0LP2Fs9eBNJTcnQ3wWSQBZO RkMYkHhhdJU+v2TTGOJi0YiM868UJt35WIM0D9rV98R2AeEcDNwyfZHS/yC8xm5uWnOB pog0oUADL42tivoxuYjYdkbd6WuxVR8MHMYnzdycToIKujK3B67VBckzBQkXQO+/mhM7 MHwQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QpSfvOra; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id rl11si17615882ejb.519.2020.08.19.12.29.26; Wed, 19 Aug 2020 12:29:50 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QpSfvOra; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726803AbgHST0k (ORCPT + 99 others); Wed, 19 Aug 2020 15:26:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40024 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726732AbgHST0j (ORCPT ); Wed, 19 Aug 2020 15:26:39 -0400 Received: from mail-il1-x144.google.com (mail-il1-x144.google.com [IPv6:2607:f8b0:4864:20::144]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A343CC061757 for ; Wed, 19 Aug 2020 12:26:38 -0700 (PDT) Received: by mail-il1-x144.google.com with SMTP id 77so21662891ilc.5 for ; Wed, 19 Aug 2020 12:26:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=Y5BGtZ5BwqTPokae+tJqoDxjKYZ/7jxyi3A6FMN4E2E=; b=QpSfvOraCUWInnVwbf3MKR/NLu0NRKWHSeAg3qqfODo4RvhX/fwn9+lgH6IQ3tYNz4 m3w4S3CJPicgeglnKYKmB8I4U3vEqYPhxemXhR9MY1tIJLteXyBSePGHhjjzttuYzkHZ WyUewGmFKBM1qE0mDlYoOTbfc1QabnpTKb30+dbqheGBEG/mrm/KvBNC7aYU/lRiSWk6 vlSxRv+hhUTAk7PuYl9KmNiKC7Huv3mnOcJEhUJHFnUPujmS1BUMSR+7PEJzWsz/XQyY C9E4X9e1+nnpvqbAvK/tnZzg+Un1js7MP5axCs6lMUgkQhppoZh8k5OZw/2goHV888Sd NVOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=Y5BGtZ5BwqTPokae+tJqoDxjKYZ/7jxyi3A6FMN4E2E=; b=ZBUE/hJh/PCOU15Xvl4GMe98KkBpm4/c5M3rlddJzcP5XAu4M6vSR4tIGjsCnuq016 FcXsjS31oJ34UPtdx+6sjX0v6nMCKjinVPolGZtnYhmwqL51+sLWXDpoXKth7FhVIn3o coTg7JsGy04wmgazngca6yQupoiAL5sOqKUQ8Hwkrvwhp1uWBvM7ZWlZJE11y+pJUblt /3JkqNImHva74+8QGG7sire/APsg/zlnYeez/sbI+kCSCkLI13rn3Oqui9mCs2uVmInK /LE/E1EZSTwrLfreUdPOCuuoxK0bYBuUNGB/mFlgkSbxAqY75quanXysk5zMMF6Mz8JK WmFQ== X-Gm-Message-State: AOAM533cM7Hr/MisYW4tDVDpdKoBu8EOVFI9O5ILgtUHM2UxWSQ8i0w6 kjUmp21Q0UU8+uUm7eJikDo1WbjPY3qUeTKoZOJMmA== X-Received: by 2002:a92:a008:: with SMTP id e8mr2004066ili.140.1597865197748; Wed, 19 Aug 2020 12:26:37 -0700 (PDT) MIME-Version: 1.0 References: <20200817193140.3659956-1-mathieu.poirier@linaro.org> <20200819173050.GA18091@willie-the-truck> In-Reply-To: <20200819173050.GA18091@willie-the-truck> From: Mathieu Poirier Date: Wed, 19 Aug 2020 13:26:26 -0600 Message-ID: Subject: Re: [PATCH] MAINTAINERS: Add entries for CoreSight and Arm SPE To: Will Deacon Cc: John Garry , Arnaldo Carvalho de Melo , Leo Yan , Linux Kernel Mailing List , "linux-arm-kernel@lists.infradead.org" , Jiri Olsa , Mark Rutland Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 19 Aug 2020 at 11:30, Will Deacon wrote: > > On Wed, Aug 19, 2020 at 11:01:38AM -0600, Mathieu Poirier wrote: > > On Tue, 18 Aug 2020 at 11:56, John Garry wrote: > > > On 17/08/2020 20:31, Mathieu Poirier wrote: > > > > diff --git a/MAINTAINERS b/MAINTAINERS > > > > index 4e2698cc7e23..f9bb76baeec9 100644 > > > > --- a/MAINTAINERS > > > > +++ b/MAINTAINERS > > > > @@ -13427,8 +13427,18 @@ F: tools/perf/ > > > > PERFORMANCE EVENTS SUBSYSTEM ARM64 PMU EVENTS > > > > R: John Garry > > > > R: Will Deacon > > > > +R: Mathieu Poirier > > > > +R: Leo Yan > > > > L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) > > > > S: Supported > > > > +F: tools/build/feature/test-libopencsd.c > > > > +F: tools/perf/arch/arm/util/auxtrace.c > > > > +F: tools/perf/arch/arm/util/cs-etm.* > > > > +F: tools/perf/arch/arm/util/pmu.c > > > > +F: tools/perf/arch/arm64/util/arm-spe.c > > > > +F: tools/perf/util/arm-spe.h > > > > +F: tools/perf/util/cs-etm-decoder/* > > > > +F: tools/perf/util/cs-etm.* > > > > > > But from the previous discussion, I thought that we wanted an entry to > > > cover all tools/perf/arch/arm64/ and other related folders. Or was it > > > just put all special interest parts (like SPE support) under one entry > > > and leave the other arm/arm64 parts to be caught by "PERFORMANCE EVENTS > > > SUBSYSTEM" entry? > > > > I do not have the time to maintain anything outside of coresight - > > listing individual files as I did removes any ambiguity on that front. > > I'm happy to add tools/perf/arch/arm and tools/perf/arch/arm64/ if you > > agree to maintain them. In that case you will have to be more > > specific about the "other related folders" you are referring to above. > > None of us have time for this, hence why I think putting us all in one entry > with all of the files listed there makes the most sense; then people do > whatever they can and try to help each other out based on how much time they > have. I think that's much better than fine-grained maintainership where a > given file has a single point of failure. Thanks for the clarification - just wanted to make sure I don't sign you guys up for something you didn't agree to. > > So I think it should include: > > tools/perf/arch/arm64/ > tools/pmu-events/arch/arm64/ > > along with the SPE and Coresight files. > > Arnaldo would still handle the patches, so this is really about giving us a > chance to review incoming patches without having to fish them out from the > lists. > > Will