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Thu, 20 Aug 2020 14:05:36 +0800 From: Yongqiang Niu To: CK Hu , Philipp Zabel , Rob Herring , Matthias Brugger CC: David Airlie , Daniel Vetter , Mark Rutland , , , , , , Yongqiang Niu Subject: [PATCH v1 06/21] drm/mediatek: add disp config and mm 26mhz clock into mutex device Date: Thu, 20 Aug 2020 14:04:03 +0800 Message-ID: <1597903458-8055-7-git-send-email-yongqiang.niu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1597903458-8055-1-git-send-email-yongqiang.niu@mediatek.com> References: <1597903458-8055-1-git-send-email-yongqiang.niu@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Content-Transfer-Encoding: base64 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org dGhlcmUgYXJlIDIgbW9yZSBjbG9jayBuZWVkIGVuYWJsZSBmb3IgZGlzcGxheS4NCnBhcnNlciB0 aGVzZSBjbG9jayB3aGVuIG11dGV4IGRldmljZSBwcm9iZSwNCmVuYWJsZSBhbmQgZGlzYWJsZSB3 aGVuIG11dGV4IG9uL29mZg0KDQpTaWduZWQtb2ZmLWJ5OiBZb25ncWlhbmcgTml1IDx5b25ncWlh bmcubml1QG1lZGlhdGVrLmNvbT4NCi0tLQ0KIGRyaXZlcnMvZ3B1L2RybS9tZWRpYXRlay9tdGtf ZHJtX2RkcC5jIHwgNDkgKysrKysrKysrKysrKysrKysrKysrKysrKysrKy0tLS0tLQ0KIDEgZmls ZSBjaGFuZ2VkLCA0MSBpbnNlcnRpb25zKCspLCA4IGRlbGV0aW9ucygtKQ0KDQpkaWZmIC0tZ2l0 IGEvZHJpdmVycy9ncHUvZHJtL21lZGlhdGVrL210a19kcm1fZGRwLmMgYi9kcml2ZXJzL2dwdS9k cm0vbWVkaWF0ZWsvbXRrX2RybV9kZHAuYw0KaW5kZXggNjA3ODhjMS4uZGU2MThhMSAxMDA2NDQN Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9tZWRpYXRlay9tdGtfZHJtX2RkcC5jDQorKysgYi9kcml2 ZXJzL2dwdS9kcm0vbWVkaWF0ZWsvbXRrX2RybV9kZHAuYw0KQEAgLTExOCw3ICsxMTgsNyBAQCBz dHJ1Y3QgbXRrX2RkcF9kYXRhIHsNCiANCiBzdHJ1Y3QgbXRrX2RkcCB7DQogCXN0cnVjdCBkZXZp Y2UJCQkqZGV2Ow0KLQlzdHJ1Y3QgY2xrCQkJKmNsazsNCisJc3RydWN0IGNsawkJCSpjbGtbM107 DQogCXZvaWQgX19pb21lbQkJCSpyZWdzOw0KIAlzdHJ1Y3QgbXRrX2Rpc3BfbXV0ZXgJCW11dGV4 WzEwXTsNCiAJY29uc3Qgc3RydWN0IG10a19kZHBfZGF0YQkqZGF0YTsNCkBAIC0yNTcsMTQgKzI1 NywzOSBAQCBpbnQgbXRrX2Rpc3BfbXV0ZXhfcHJlcGFyZShzdHJ1Y3QgbXRrX2Rpc3BfbXV0ZXgg Km11dGV4KQ0KIHsNCiAJc3RydWN0IG10a19kZHAgKmRkcCA9IGNvbnRhaW5lcl9vZihtdXRleCwg c3RydWN0IG10a19kZHAsDQogCQkJCQkgICBtdXRleFttdXRleC0+aWRdKTsNCi0JcmV0dXJuIGNs a19wcmVwYXJlX2VuYWJsZShkZHAtPmNsayk7DQorCWludCByZXQ7DQorCWludCBpOw0KKw0KKwlm b3IgKGkgPSAwOyBpIDwgQVJSQVlfU0laRShkZHAtPmNsayk7IGkrKykgew0KKwkJaWYgKElTX0VS UihkZHAtPmNsa1tpXSkpDQorCQkJY29udGludWU7DQorCQlyZXQgPSBjbGtfcHJlcGFyZV9lbmFi bGUoZGRwLT5jbGtbaV0pOw0KKwkJaWYgKHJldCkgew0KKwkJCXByX2VycigiZmFpbGVkIHRvIGVu YWJsZSBjbG9jaywgZXJyICVkLiBpOiVkXG4iLA0KKwkJCQlyZXQsIGkpOw0KKwkJCWdvdG8gZXJy Ow0KKwkJfQ0KKwl9DQorDQorCXJldHVybiAwOw0KKw0KK2VycjoNCisJd2hpbGUgKC0taSA+PSAw KQ0KKwkJY2xrX2Rpc2FibGVfdW5wcmVwYXJlKGRkcC0+Y2xrW2ldKTsNCisJcmV0dXJuIHJldDsN CiB9DQogDQogdm9pZCBtdGtfZGlzcF9tdXRleF91bnByZXBhcmUoc3RydWN0IG10a19kaXNwX211 dGV4ICptdXRleCkNCiB7DQogCXN0cnVjdCBtdGtfZGRwICpkZHAgPSBjb250YWluZXJfb2YobXV0 ZXgsIHN0cnVjdCBtdGtfZGRwLA0KIAkJCQkJICAgbXV0ZXhbbXV0ZXgtPmlkXSk7DQotCWNsa19k aXNhYmxlX3VucHJlcGFyZShkZHAtPmNsayk7DQorCWludCBpOw0KKw0KKwkgZm9yIChpID0gMDsg aSA8IEFSUkFZX1NJWkUoZGRwLT5jbGspOyBpKyspIHsNCisJCWlmIChJU19FUlIoZGRwLT5jbGtb aV0pKQ0KKwkJCWNvbnRpbnVlOw0KKwkJY2xrX2Rpc2FibGVfdW5wcmVwYXJlKGRkcC0+Y2xrW2ld KTsNCisJfQ0KIH0NCiANCiB2b2lkIG10a19kaXNwX211dGV4X2FkZF9jb21wKHN0cnVjdCBtdGtf ZGlzcF9tdXRleCAqbXV0ZXgsDQpAQCAtNDE1LDExICs0NDAsMTkgQEAgc3RhdGljIGludCBtdGtf ZGRwX3Byb2JlKHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYpDQogCWRkcC0+ZGF0YSA9IG9m X2RldmljZV9nZXRfbWF0Y2hfZGF0YShkZXYpOw0KIA0KIAlpZiAoIWRkcC0+ZGF0YS0+bm9fY2xr KSB7DQotCQlkZHAtPmNsayA9IGRldm1fY2xrX2dldChkZXYsIE5VTEwpOw0KLQkJaWYgKElTX0VS UihkZHAtPmNsaykpIHsNCi0JCQlpZiAoUFRSX0VSUihkZHAtPmNsaykgIT0gLUVQUk9CRV9ERUZF UikNCi0JCQkJZGV2X2VycihkZXYsICJGYWlsZWQgdG8gZ2V0IGNsb2NrXG4iKTsNCi0JCQlyZXR1 cm4gUFRSX0VSUihkZHAtPmNsayk7DQorCQlpbnQgcmV0Ow0KKw0KKwkJZm9yIChpID0gMDsgaSA8 IEFSUkFZX1NJWkUoZGRwLT5jbGspOyBpKyspIHsNCisJCQlkZHAtPmNsa1tpXSA9IG9mX2Nsa19n ZXQoZGV2LT5vZl9ub2RlLCBpKTsNCisNCisJCQlpZiAoSVNfRVJSKGRkcC0+Y2xrW2ldKSkgew0K KwkJCQlyZXQgPSBQVFJfRVJSKGRkcC0+Y2xrW2ldKTsNCisJCQkJaWYgKHJldCAhPSBFUFJPQkVf REVGRVIpDQorCQkJCQlkZXZfZXJyKGRldiwgIkZhaWxlZCB0byBnZXQgY2xvY2sgJWRcbiIsDQor CQkJCQkJcmV0KTsNCisNCisJCQkJcmV0dXJuIHJldDsNCisJCQl9DQogCQl9DQogCX0NCiANCi0t IA0KMS44LjEuMS5kaXJ0eQ0K