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Date:   Thu, 20 Aug 2020 17:01:13 -0700
From:   Prashant Malani <pmalani@chromium.org>
To:     Azhar Shaikh <azhar.shaikh@intel.com>
Cc:     bleung@chromium.org, enric.balletbo@collabora.com,
        groeck@chromium.org, heikki.krogerus@linux.intel.com,
        linux-kernel@vger.kernel.org, rajmohan.mani@intel.com,
        utkarsh.h.patel@intel.com, casey.g.bowman@intel.com
Subject: Re: [PATCH v4 3/3] platform/chrome: cros_ec_typec: Re-order
 connector configuration steps
Message-ID: <20200821000113.GA2553024@google.com>
References: <20200820233833.4551-1-azhar.shaikh@intel.com>
 <20200820233833.4551-4-azhar.shaikh@intel.com>
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On Thu, Aug 20, 2020 at 04:38:32PM -0700, Azhar Shaikh wrote:
> As per USB Type-C Spec R2.0 section 4.5.1.2 (Connecting Sources and Sinks)
> and section 4.5.2.2 (Connection State Machine Requirements), the typical
> flow for configuring a device connected to a typeC port is as below:
> 
> 1. Source/sink detection
> 2. Orientation
> 3. Data role
> 4. VCONN
> 5. VBUS (USB Type-C currents)
> 6. The connector is now configured. We can start the PD communication
>    that should lead into configuration of the mux if we enter a mode.
> 
> But in existing code data role was set after the connector and mux are
> already configured. So fix this by following the spec to set the data
> role before the connector and mux are configured.
> 
> Signed-off-by: Azhar Shaikh <azhar.shaikh@intel.com>
To be clear, I still maintain that the quoted section pertains to
*detection* of those various properties (which is handled by the TCPM in
the Chrome OS EC), and not any ordering for setting switches etc.

That said, I'm not opposed to the re-ordering, so:
Reviewed-by: Prashant Malani <pmalani@chromium.org>
> ---
> Changes in v4:
>  - No change
> 
> Changes in v3:
>  - New patch added
> 
>  drivers/platform/chrome/cros_ec_typec.c | 13 +++++++------
>  1 file changed, 7 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c
> index 2b43e1176e73..9e4fad9ca59e 100644
> --- a/drivers/platform/chrome/cros_ec_typec.c
> +++ b/drivers/platform/chrome/cros_ec_typec.c
> @@ -516,6 +516,12 @@ static int cros_typec_configure_mux(struct cros_typec_data *typec, int port_num,
>  	if (ret)
>  		return ret;
>  
> +	ret = usb_role_switch_set_role(typec->ports[port_num]->role_sw,
> +				       pd_ctrl->role & PD_CTRL_RESP_ROLE_DATA
> +				       ? USB_ROLE_HOST : USB_ROLE_DEVICE);
> +	if (ret)
> +		return ret;
> +
>  	if (mux_flags & USB_PD_MUX_TBT_COMPAT_ENABLED) {
>  		ret = cros_typec_enable_tbt(typec, port_num, pd_ctrl);
>  	} else if (mux_flags & USB_PD_MUX_DP_ENABLED) {
> @@ -533,12 +539,7 @@ static int cros_typec_configure_mux(struct cros_typec_data *typec, int port_num,
>  		ret = -ENOTSUPP;
>  	}
>  
> -	if (ret)
> -		return ret;
> -
> -	return usb_role_switch_set_role(typec->ports[port_num]->role_sw,
> -				       pd_ctrl->role & PD_CTRL_RESP_ROLE_DATA
> -				       ? USB_ROLE_HOST : USB_ROLE_DEVICE);
> +	return ret;
>  }
>  
>  static int cros_typec_port_update(struct cros_typec_data *typec, int port_num)
> -- 
> 2.17.1
>