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[85.30.9.151]) by smtp.gmail.com with ESMTPSA id e14sm566846ljl.96.2020.08.21.12.54.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Aug 2020 12:54:32 -0700 (PDT) Date: Fri, 21 Aug 2020 11:46:03 -0700 From: Olof Johansson To: Daniel Palmer Cc: soc@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux@armlinux.org.uk, w@1wt.eu Subject: Re: [RFC PATCH 2/3] ARM: mstar: msc313-intc interrupt controller driver Message-ID: <20200821184603.GA3407@lx2k> References: <20200730130044.2037509-1-daniel@0x0f.com> <20200730130044.2037509-3-daniel@0x0f.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200730130044.2037509-3-daniel@0x0f.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Thu, Jul 30, 2020 at 10:00:43PM +0900, Daniel Palmer wrote: > Add a driver for the two peripheral interrupt controllers > in MStar MSC313 and other MStar/Sigmastar Armv7 SoCs. > > Supports both the "IRQ" and "FIQ" controllers that > forward interrupts from the various IP blocks inside the > SoC to the ARM GIC. > > They are basically the same thing except for one difference: > The FIQ controller needs to clear the interrupt and the IRQ > controller doesn't. Sorry for the late response, going through patches we might have missed or that need replies now... This needs to go to the irqchip maintainers for review. If you get their acked/reviewed-by, we can merge it through our tree if that is easier. But they need to sign off on it. Feel free to cc soc@kernel.org on them though, and we always merge the dts changes through our tree. -Olof