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[198.48.202.89]) by smtp.gmail.com with ESMTPSA id h125sm2750940qkf.90.2020.08.22.13.04.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 22 Aug 2020 13:04:07 -0700 (PDT) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Cc: "Kishon Vijay Abraham I" , "Vinod" , "Linux Kernel Mailing List" Subject: Re: [PATCH v3 1/1] phy: tusb1210: use bitmasks to set VENDOR_SPECIFIC2 From: "Liam Beguin" To: "Geert Uytterhoeven" Date: Sat, 22 Aug 2020 15:59:23 -0400 Message-Id: In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Geert, On Wed Aug 19, 2020 at 9:57 AM EDT, Geert Uytterhoeven wrote: > Hi Liam, > > > On Mon, Aug 17, 2020 at 7:38 PM Liam Beguin > wrote: > > From: Liam Beguin > > > > Start by reading the content of the VENDOR_SPECIFIC2 register and updat= e > > each bit field based on device properties when defined. > > > > The use of bit masks prevents fields from overriding each other and > > enables users to clear bits which are set by default, like datapolarity > > in this instance. > > > > Signed-off-by: Liam Beguin > > --- > > Changes since v1: > > - use set_mask_bits > > > > Changes since v2: > > - fix missing bit shift dropped in v2 > > - rebase on 5.9-rc1 > > > > drivers/phy/ti/phy-tusb1210.c | 27 +++++++++++++++++---------- > > 1 file changed, 17 insertions(+), 10 deletions(-) > > > > diff --git a/drivers/phy/ti/phy-tusb1210.c b/drivers/phy/ti/phy-tusb121= 0.c > > index d8d0cc11d187..358842b5790f 100644 > > --- a/drivers/phy/ti/phy-tusb1210.c > > +++ b/drivers/phy/ti/phy-tusb1210.c > > @@ -14,8 +14,11 @@ > > > > #define TUSB1210_VENDOR_SPECIFIC2 0x80 > > #define TUSB1210_VENDOR_SPECIFIC2_IHSTX_SHIFT 0 > > +#define TUSB1210_VENDOR_SPECIFIC2_IHSTX_MASK GENMASK(3, 0) > > #define TUSB1210_VENDOR_SPECIFIC2_ZHSDRV_SHIFT 4 > > +#define TUSB1210_VENDOR_SPECIFIC2_ZHSDRV_MASK GENMASK(5, 4) > > #define TUSB1210_VENDOR_SPECIFIC2_DP_SHIFT 6 > > +#define TUSB1210_VENDOR_SPECIFIC2_DP_MASK BIT(6) > > > > struct tusb1210 { > > struct ulpi *ulpi; > > @@ -118,23 +121,27 @@ static int tusb1210_probe(struct ulpi *ulpi) > > * diagram optimization and DP/DM swap. > > */ > > > > + reg =3D ulpi_read(ulpi, TUSB1210_VENDOR_SPECIFIC2); > > + > > /* High speed output drive strength configuration */ > > - device_property_read_u8(&ulpi->dev, "ihstx", &val); > > - reg =3D val << TUSB1210_VENDOR_SPECIFIC2_IHSTX_SHIFT; > > + if (!device_property_read_u8(&ulpi->dev, "ihstx", &val)) > > + reg =3D set_mask_bits(®, TUSB1210_VENDOR_SPECIFIC2_I= HSTX_MASK, > > + val << TUSB1210_VENDOR_SPECIFIC2_IH= STX_SHIFT); > > Triggered by your patches to add support for cmpxchg on u8 pointers to > various architectures (which is a valuable goal in itself ;-), I decided > to have a look at the underlying problem you were facing. > Thanks for taking the time to look at this, I'll still give the SuperH patch a try if I can test it properly :-). > IMHO, using set_mask_bits() is overkill here. That helper is meant to > update individual bits in a variable that may be accessed concurrently, > hence its use of cmpxchg(). > > In this driver, you just want to modify a local variable, by clearing a > field, and setting some bits. No concurrency is involved. > Perhaps using FIELD_PREP() from include/linux/bitfield.h is more > appropriate? > Using set_mask_bits() does seem overkill seeing that it triggers all these kbot warnings... I'll prepare a patch using functions from bitfield.h instead. Thanks again, Liam > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- > geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. > But > when I'm talking to journalists I just say "programmer" or something > like that. > -- Linus Torvalds