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[23.128.96.18]) by mx.google.com with ESMTP id s11si2789169edu.88.2020.08.24.01.25.16; Mon, 24 Aug 2020 01:25:39 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726306AbgHXIWf (ORCPT + 99 others); Mon, 24 Aug 2020 04:22:35 -0400 Received: from mga12.intel.com ([192.55.52.136]:11442 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725780AbgHXIWf (ORCPT ); Mon, 24 Aug 2020 04:22:35 -0400 IronPort-SDR: nZdivQrC3MoHja5/2pg3/DzdiKIS/eb+KvCJLlkkDrOgJ/ZFg6Zo0lP9SwK/Ttvxths9GCqTvY 1RMevpldP+6Q== X-IronPort-AV: E=McAfee;i="6000,8403,9722"; a="135402587" X-IronPort-AV: E=Sophos;i="5.76,347,1592895600"; d="scan'208";a="135402587" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Aug 2020 01:22:35 -0700 IronPort-SDR: 83dFkHN98CUz5kwF5Qoia5wrbwvXZE09znrTf3Z4V9iEH0BvIugh8QyCpgO7GKZD3ludAlnV4c g5UpC9WlxZhw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,347,1592895600"; d="scan'208";a="402245358" Received: from lahna.fi.intel.com (HELO lahna) ([10.237.72.163]) by fmsmga001.fm.intel.com with SMTP; 24 Aug 2020 01:22:29 -0700 Received: by lahna (sSMTP sendmail emulation); Mon, 24 Aug 2020 11:22:27 +0300 Date: Mon, 24 Aug 2020 11:22:27 +0300 From: Mika Westerberg To: Arnd Bergmann Cc: Daniel Gutson , Tudor Ambarus , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Boris Brezillon , linux-mtd , "linux-kernel@vger.kernel.org" , Alex Bazhaniuk , Richard Hughes , Greg Kroah-Hartman Subject: Re: [PATCH] mtd: spi-nor: intel-spi: Do not try to make the SPI flash chip writable Message-ID: <20200824082227.GU1375436@lahna.fi.intel.com> References: <20200819065721.GA1375436@lahna.fi.intel.com> <20200819091123.GE1375436@lahna.fi.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Aug 22, 2020 at 06:06:03PM +0200, Arnd Bergmann wrote: > On Wed, Aug 19, 2020 at 11:11 AM Mika Westerberg > wrote: > > On Wed, Aug 19, 2020 at 10:38:24AM +0200, Arnd Bergmann wrote: > > > On Wed, Aug 19, 2020 at 8:57 AM Mika Westerberg wrote: > > > > > > Actually thinking about this bit more, to make PCI and the platform > > > > parts consistent we can make the "writeable" control this for the PCI > > > > part as well. So what if we add a callback to struct intel_spi_boardinfo > > > > that the PCI driver populates and then the "core" driver uses to enable > > > > writing when "writeable" is set to 1. > > > > > > If you are really worried about the write protection being bypassed by > > > a different driver or code injection, the best way would seem to be to > > > only enable writing in the mtd write callback and disable it immediately > > > after the write is complete. I still don't see why this hardware would > > > be more susceptible to this kind of attack than other drivers though, > > > as it already has the safeguard against writing through the MTD layer > > > without the module parameter. > > > > Hmm, is there already a mechanism at the MTD level to prevent writes? If > > that's the case then sure we can use that instead. > > The mtd core just checks both the permissions on the device node (which > default to 0600 without any special udev rules) and the MTD_WRITEABLE > on the underlying device that is controlled by the module parameter > in case of intel-spi{,-platform,-pci}.c. OK, thanks. Since we cannot really get rid of the module parameter (AFAIK there are users for it), I still think we should just make the "writeable" to apply to the PCI part as well. That should at least make it consistent, and it also solves Daniel's case.