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[23.128.96.18]) by mx.google.com with ESMTP id h5si6201554edj.5.2020.08.24.02.10.08; Mon, 24 Aug 2020 02:10:31 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726704AbgHXJJc (ORCPT + 99 others); Mon, 24 Aug 2020 05:09:32 -0400 Received: from mout.kundenserver.de ([217.72.192.74]:50465 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729369AbgHXJIx (ORCPT ); Mon, 24 Aug 2020 05:08:53 -0400 Received: from mail-qv1-f50.google.com ([209.85.219.50]) by mrelayeu.kundenserver.de (mreue107 [212.227.15.145]) with ESMTPSA (Nemesis) id 1Mnqfc-1ky6PI3bY2-00pNFx for ; Mon, 24 Aug 2020 11:08:51 +0200 Received: by mail-qv1-f50.google.com with SMTP id o2so3390408qvk.6 for ; Mon, 24 Aug 2020 02:08:50 -0700 (PDT) X-Gm-Message-State: AOAM5316+0USBK8FHkP6DQFFYUgnqagO0YO7dB7EUWwMMxEA6V+QajnY DrgFgecUBabpIENew/SYI4NVPUb56tWegl9AR+U= X-Received: by 2002:ad4:450e:: with SMTP id k14mr3691202qvu.211.1598260129733; Mon, 24 Aug 2020 02:08:49 -0700 (PDT) MIME-Version: 1.0 References: <20200819065721.GA1375436@lahna.fi.intel.com> <20200819091123.GE1375436@lahna.fi.intel.com> <20200824082227.GU1375436@lahna.fi.intel.com> In-Reply-To: <20200824082227.GU1375436@lahna.fi.intel.com> From: Arnd Bergmann Date: Mon, 24 Aug 2020 11:08:33 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] mtd: spi-nor: intel-spi: Do not try to make the SPI flash chip writable To: Mika Westerberg Cc: Daniel Gutson , Tudor Ambarus , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Boris Brezillon , linux-mtd , "linux-kernel@vger.kernel.org" , Alex Bazhaniuk , Richard Hughes , Greg Kroah-Hartman Content-Type: text/plain; charset="UTF-8" X-Provags-ID: V03:K1:a08d9XdYqwQJRaN+BHtXnXhAQiHpBrlRf5hS48bbIwqQeXMGIkd jkqUFmYvcBIOYryduDgqbs4fsWfTlP+YRHfOpKkYcmjAtTrbVqeRnfxOjPrLSTJ9nSgmznb KuP4/Er5BiimTn6D22E0agGi3O93jtzKAbenOor0qWQ/J0UOqFFP7HFl3nJOMR/uQw77K9L 0BJNBvgkIxWDzId4niX2g== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1;V03:K0:71mz89eH4Iw=:m7/EElm538pE15lbdd2HF1 89X46zuvzeXXAv+oc932+rq6EQRPbE/3DrJTvdhmy6EJ0/eUAgZ7jfBXhnh71JsJ8dtJEZKn+ nNxuc+fyfc0kL2B/3L4ZY2NGNt4r/mW3yus4lThnumiSlxNJPKhltwxhMcNEhFzVHQ/pDaN5L nKN8oPPPhudH/b8OzvlQtDr/j2ZJPSATHj5hvoWout2xH/vRZw9yi0INSrJ5n4dxy5WTYuzc6 akGC97vWB/MxFhw7TJyKarSJ6q9VeJJynFoJCELd2tlILBkTdPXZwKF9faWrj49BZ9scCwn5h ntP1nrVUW9oCI10KyMx14iz5JizFThVitOeWy7PvYIG8l60xPpkNQWveOfoYMe8ouKYX6G92h iRV1BtNk0cgwqtAfVHWKSaIaIYCPDjWG1dlGd2ot6ar5vU/aY/tck0FxNuIWQv8EpgWIt6ouQ 1cJ6/dAnLEeYWmX+cIQGeToL/MzPJLImYBIMFCYBj88sTPGJL1xe9QktP+cFXHIYzjNfyKKTE kr1DQnOWos1oS1HomhBlvmqAZFWJC4cxsgTn+qHeHDWSnKINiwALjvyejGFRtkJCeC84QWcgG VWOq9dShOcfKc9HmqZiZNUOTfiPWTHr0gs1UFR7M8Zvvv3iIF3G+XzLiFfNrPbhFj21eT2jjt x/gccGUwWcE2yF7b669c6IFmSbwkBUf92YEH5pBUk0qglIILSvqxM8k5H7DfumGO61gQGuBbQ T7m46Ps5KA6uW1lJfuEai22BQQcfvSvjzHaQVtSz2HXMVkXjrlaiSt06LJFPPAeSumJob23eo YE7xhfFzJsjlsVM/YIH32IgyN0k7mVrxUtgEZavLoE1LQ6utKN4cu6Fhke4DtE+Un8z6zmm Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Aug 24, 2020 at 10:22 AM Mika Westerberg wrote: > On Sat, Aug 22, 2020 at 06:06:03PM +0200, Arnd Bergmann wrote: > > On Wed, Aug 19, 2020 at 11:11 AM Mika Westerberg > > > > The mtd core just checks both the permissions on the device node (which > > default to 0600 without any special udev rules) and the MTD_WRITEABLE > > on the underlying device that is controlled by the module parameter > > in case of intel-spi{,-platform,-pci}.c. > > OK, thanks. > > Since we cannot really get rid of the module parameter (AFAIK there are > users for it), I still think we should just make the "writeable" to > apply to the PCI part as well. That should at least make it consistent, > and it also solves Daniel's case. Can you explain Daniel's case then? I still don't understand what he actually wants. As I keep repeating, the module parameter *does* apply to the pci driver front-end since it determines whether the driver will disallow writes to the mtd device without it. The only difference is that the pci driver will attempt to set the hardware bit without checking the module parameter first, while the platform driver does not. If the module parameter is not set however, the state of the hardware bit is never checked again. Arnd