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[23.128.96.18]) by mx.google.com with ESMTP id v7si7469335edq.227.2020.08.24.12.09.38; Mon, 24 Aug 2020 12:10:01 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=kbX7pFKd; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727910AbgHXTIU (ORCPT + 99 others); Mon, 24 Aug 2020 15:08:20 -0400 Received: from mail.kernel.org ([198.145.29.99]:58922 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725976AbgHXTIS (ORCPT ); Mon, 24 Aug 2020 15:08:18 -0400 Received: from kozik-lap.mshome.net (unknown [194.230.155.216]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 47E6E20866; Mon, 24 Aug 2020 19:08:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1598296097; bh=AgWkGLVNMdD2DNKd/wZ2SbCNZ2uFLt8zFJn6wF1Cl4Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kbX7pFKdM1J7IiNFrdx/+DoYw1uK+WxRMew/kLsrqMMEiyUhH8rJ27ynDGz5JKsk8 rEKuAeTRektrsoa9aNDBqZneGy19fjPWZFjdz1EHH/L/qMdtxXUGrGM+qvQJ/kSU+j 0peIzmIJRrEaX17Ti37z51AkUuC74q8qeaWhkzB0= From: Krzysztof Kozlowski To: Lee Jones , Rob Herring , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Adam Ford , Daniel Baluta , Anson Huang , Robin Gong , Li Jun , Matti Vaittinen , Han Xu , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org Cc: Krzysztof Kozlowski Subject: [PATCH 13/16] arm64: dts: imx8mq-pico-pi: Align pin configuration group names with schema Date: Mon, 24 Aug 2020 21:06:58 +0200 Message-Id: <20200824190701.8447-13-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200824190701.8447-1-krzk@kernel.org> References: <20200824190701.8447-1-krzk@kernel.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Device tree schema expects pin configuration groups to end with 'grp' suffix, otherwise dtbs_check complain with a warning like: ... do not match any of the regexes: 'grp$', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dts | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dts b/arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dts index 59da96b7143f..f4d5748a7bd6 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dts @@ -297,7 +297,7 @@ >; }; - pinctrl_pmic: pmicirq { + pinctrl_pmic: pmicirqgrp { fsl,pins = < MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41 >; @@ -335,7 +335,7 @@ >; }; - pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { fsl,pins = < MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x85 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc5 @@ -351,7 +351,7 @@ >; }; - pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { fsl,pins = < MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x87 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc7 @@ -367,7 +367,7 @@ >; }; - pinctrl_usdhc2_gpio: usdhc2grpgpio { + pinctrl_usdhc2_gpio: usdhc2gpiogrp { fsl,pins = < MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41 >; @@ -385,7 +385,7 @@ >; }; - pinctrl_usdhc2_100mhz: usdhc2grp100mhz { + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { fsl,pins = < MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x85 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc5 @@ -397,7 +397,7 @@ >; }; - pinctrl_usdhc2_200mhz: usdhc2grp200mhz { + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { fsl,pins = < MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x87 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc7 -- 2.17.1