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Subject: Re: [PATCH v5 4/8] powerpc/watchpoint: Move DAWR detection logic
 outside of hw_breakpoint.c
To:     Christophe Leroy <christophe.leroy@csgroup.eu>,
        christophe.leroy@c-s.fr
Cc:     mpe@ellerman.id.au, mikey@neuling.org, paulus@samba.org,
        naveen.n.rao@linux.vnet.ibm.com, pedromfc@linux.ibm.com,
        rogealve@linux.ibm.com, jniethe5@gmail.com,
        linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
        Ravi Bangoria <ravi.bangoria@linux.ibm.com>
References: <20200825043617.1073634-1-ravi.bangoria@linux.ibm.com>
 <20200825043617.1073634-5-ravi.bangoria@linux.ibm.com>
 <0a73280b-c231-a7bb-18d9-abf2a37ba24b@csgroup.eu>
From:   Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Message-ID: <59ac33ed-4ed3-2c92-7b0b-1d14abf7186b@linux.ibm.com>
Date:   Tue, 25 Aug 2020 16:38:17 +0530
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Hi Christophe,

>> +static int cache_op_size(void)
>> +{
>> +#ifdef __powerpc64__
>> +    return ppc64_caches.l1d.block_size;
>> +#else
>> +    return L1_CACHE_BYTES;
>> +#endif
>> +}
> 
> You've got l1_dcache_bytes() in arch/powerpc/include/asm/cache.h to do that.
> 
>> +
>> +void wp_get_instr_detail(struct pt_regs *regs, struct ppc_inst *instr,
>> +             int *type, int *size, unsigned long *ea)
>> +{
>> +    struct instruction_op op;
>> +
>> +    if (__get_user_instr_inatomic(*instr, (void __user *)regs->nip))
>> +        return;
>> +
>> +    analyse_instr(&op, regs, *instr);
>> +    *type = GETTYPE(op.type);
>> +    *ea = op.ea;
>> +#ifdef __powerpc64__
>> +    if (!(regs->msr & MSR_64BIT))
>> +        *ea &= 0xffffffffUL;
>> +#endif
> 
> This #ifdef is unneeded, it should build fine on a 32 bits too.

This patch is just a code movement from one file to another.
I don't really change the logic. Would you mind if I do a
separate patch for these changes (not a part of this series)?

Thanks for review,
Ravi