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Subject: Re: [PATCH 2/4] i2c: at91: implement i2c bus recovery
To:     Wolfram Sang <wsa@the-dreams.de>, Codrin.Ciubotariu@microchip.com,
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From:   Phil Reid <preid@electromag.com.au>
Message-ID: <8deeae50-2d67-d728-7afd-1b8f1b7a927e@electromag.com.au>
Date:   Wed, 26 Aug 2020 07:44:02 +0800
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On 25/08/2020 21:28, Wolfram Sang wrote:
> Hi Phil,
> 
> yes, this thread is old but a similar issue came up again...
> 
> On Fri, Oct 25, 2019 at 09:14:00AM +0800, Phil Reid wrote:
> 
>>>
>>>> So at the beginning of a new transfer, we should check if SDA (or SCL?)
>>>> is low and, if it's true, only then we should try recover the bus.
>>>
>>> Yes, this is the proper time to do it. Remember, I2C does not define a
>>> timeout.
>>>
>>
>> FYI: Just a single poll at the start of the transfer, for it being low, will cause problems with multi-master buses.
>> Bus recovery should be attempted after a timeout when trying to communicate, even thou i2c doesn't define a timeout.
>>
>> I'm trying to fix the designware drivers handling of this at the moment.
> 
> I wonder what you ended up with? You are right, a single poll is not
> enough. It only might be if one applies the new "single-master" binding
> for a given bus. If that is not present, my best idea so far is to poll
> SDA for the time defined in adapter->timeout and if it is all low, then
> initiate a recovery.
> 

On my todo list still.

Our system eventually recovers at the moment and the multi-master bus
doesn't contain anything that's time critical to our systems operation.


-- 
Regards
Phil Reid

ElectroMagnetic Imaging Technology Pty Ltd
Development of Geophysical Instrumentation & Software
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