Received: by 2002:a05:6a10:a0d1:0:0:0:0 with SMTP id j17csp3347766pxa; Tue, 25 Aug 2020 19:51:08 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwErWnCJ5CScxObVZsHNAdO0nYHe9DQFC2ZpMKyhFew+DDX8he4RnCRvwOKyNTfhzTZQW0X X-Received: by 2002:a17:906:660b:: with SMTP id b11mr14378090ejp.509.1598410268789; Tue, 25 Aug 2020 19:51:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1598410268; cv=none; d=google.com; s=arc-20160816; b=od2VKcyv+ueo7w47LGiQIFtmiHD4FKxfb5Vb1INXPxvq1GGGrxkmP6EFqdoo4Lt0wd 4H4NKiDi/ftLEJ7M8Yp0gMOYlDT6dV0tbNZisBd6qR4jTzU3X08M//fxxg6dq/U+C9aK avCp7Fl+6VwFsaZdXv+8pquhhHJyUm5UfGPaYVnNLPG6CS9pkgN1uG6WG5hA+Ee/BeRh d7sAibA8MvLruU0FGlWszpciSK5f+CDo/0bbLefGbFz7G9KJEl0it+SJqP+RlnNmXZZ2 BMH7O7ZNNCrvpyPQqoWRExfzNv7VDk6WjaGtK5uPCmlWg8LE3gnz5130dFLh+xhiRCOa D/YA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=PYGWCSTwJhvFWjkJL5bmMKN2P6gpWXjSaK/EHq+OFls=; b=sG6cNV92W4DsE1OWpXUQ5srcqp0m27b1UnXNT6BQK7thJ3+oy9KNOLYgJKor80Q7+i yr/wrlMFs0fAT9aWS0B4FtF1h5Zl0PnEQUfaKGKa7x7cSisCBjYsD0rnux753CmG7Ovq HAzHCjcJ6ArV8/RKd0HVJ8t8/EZ6X5b7pbpbpJYs3J3y7uBoq4FfI+QhvLwbC962cFlW 1IcVC6FgsQUYf54slql2WJAXLEHhaJWYknuuCso4CO/h8etppHIf0ZtKBKA2QehqooGB 0MFfyiC7GIHelUsES/uagbNcdctsbZM9xwpuucmd/tOPIdwZKEoFPtrWwCpZ16aw9omL U3Ow== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=gmZuxiFZ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id v13si717618edl.376.2020.08.25.19.50.46; Tue, 25 Aug 2020 19:51:08 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=gmZuxiFZ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726940AbgHZCsC (ORCPT + 99 others); Tue, 25 Aug 2020 22:48:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34762 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726770AbgHZCrU (ORCPT ); Tue, 25 Aug 2020 22:47:20 -0400 Received: from mail-pl1-x644.google.com (mail-pl1-x644.google.com [IPv6:2607:f8b0:4864:20::644]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B17C6C061796 for ; Tue, 25 Aug 2020 19:47:19 -0700 (PDT) Received: by mail-pl1-x644.google.com with SMTP id bh1so193124plb.12 for ; Tue, 25 Aug 2020 19:47:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PYGWCSTwJhvFWjkJL5bmMKN2P6gpWXjSaK/EHq+OFls=; b=gmZuxiFZ/L09TxqfY65i+tEt1wI6DfK0zatd4VvKz6oN+zEu8gGwjYcittr2sr4jrq i3K3HQkpthnCsSOz6lc1yuwXlNqxT/gjtCS5LfBzbe+/XYnQ3b78fMYcRCV6vjeClAoB wh4XkuYhjVW8Brt17IZ7antwwHwmcEfqNATSk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PYGWCSTwJhvFWjkJL5bmMKN2P6gpWXjSaK/EHq+OFls=; b=cn5p8BP4xGs06lCo1yca6VUKJRC0GJu41NTfS9WytG5O3mU0vB3WUmsM2eGgHqR0vG TY9IX9vAwfFkXzgtBDsXk29km46Fbr6PKads4Jx86JesHJHtxxs8pbIyqecDamm4zbu8 AHYGbUWXLH42HsqfUE1peRRjJfJakLqjcJK3ll9wAE9h24sV+ZJAiEh5rwQ4t2fYgAjg A8/pjJq4dXyHAAExbsWK3lmtKTUiK/ieo02lRQac9OjcpmBYWs6cvR1a9O+u8blG7338 ONpewbycN1F70+xr426w5uBWeh0kO74I0Y7KpOt6876rDcnn6VDSXzidI9tPg3pXmVrp 9Grw== X-Gm-Message-State: AOAM533cxVq3YGIMi0+pKSbFVJZOD8Ox5AW3qdA1HPVH1Kv9GJPZSFrg zi5rh6w6HZ0YJwcYRK5Xa6sjVg== X-Received: by 2002:a17:902:900a:: with SMTP id a10mr9995410plp.203.1598410035953; Tue, 25 Aug 2020 19:47:15 -0700 (PDT) Received: from smtp.gmail.com ([2620:15c:202:1:3e52:82ff:fe6c:83ab]) by smtp.gmail.com with ESMTPSA id u65sm684381pfb.102.2020.08.25.19.47.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Aug 2020 19:47:15 -0700 (PDT) From: Stephen Boyd To: Kishon Vijay Abraham I , Vinod Koul Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Jeykumar Sankaran , Chandan Uddaraju , Vara Reddy , Tanmay Shah , Bjorn Andersson , Manu Gautam , Sandeep Maheswaram , Douglas Anderson , Sean Paul , Jonathan Marek , Dmitry Baryshkov , Rob Clark Subject: [PATCH v1 2/9] phy: qcom-qmp: Move phy mode into struct qmp_phy Date: Tue, 25 Aug 2020 19:47:04 -0700 Message-Id: <20200826024711.220080-3-swboyd@chromium.org> X-Mailer: git-send-email 2.28.0.297.g1956fa8f8d-goog In-Reply-To: <20200826024711.220080-1-swboyd@chromium.org> References: <20200826024711.220080-1-swboyd@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The phy mode pertains to the phy itself, i.e. 'struct qmp_phy', not the wrapper, i.e. 'struct qcom_qmp'. Move the phy mode into the phy structure to more accurately reflect what is going on. This also cleans up 'struct qcom_qmp' so that it can eventually be the place where qmp wrapper wide data is located, paving the way for the USB3+DP combo phy. Cc: Jeykumar Sankaran Cc: Chandan Uddaraju Cc: Vara Reddy Cc: Tanmay Shah Cc: Bjorn Andersson Cc: Manu Gautam Cc: Sandeep Maheswaram Cc: Douglas Anderson Cc: Sean Paul Cc: Jonathan Marek Cc: Dmitry Baryshkov Cc: Rob Clark Signed-off-by: Stephen Boyd --- drivers/phy/qualcomm/phy-qcom-qmp.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index 562053ce9455..7ee9e966dc6d 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c @@ -1812,6 +1812,7 @@ struct qmp_phy_cfg { * @index: lane index * @qmp: QMP phy to which this lane belongs * @lane_rst: lane's reset controller + * @mode: current PHY mode */ struct qmp_phy { struct phy *phy; @@ -1825,6 +1826,7 @@ struct qmp_phy { unsigned int index; struct qcom_qmp *qmp; struct reset_control *lane_rst; + enum phy_mode mode; }; /** @@ -1843,7 +1845,6 @@ struct qmp_phy { * @phy_mutex: mutex lock for PHY common block initialization * @init_count: phy common block initialization count * @phy_initialized: indicate if PHY has been initialized - * @mode: current PHY mode * @ufs_reset: optional UFS PHY reset handle */ struct qcom_qmp { @@ -1861,7 +1862,6 @@ struct qcom_qmp { struct mutex phy_mutex; int init_count; bool phy_initialized; - enum phy_mode mode; struct reset_control *ufs_reset; }; @@ -2801,9 +2801,8 @@ static int qcom_qmp_phy_set_mode(struct phy *phy, enum phy_mode mode, int submode) { struct qmp_phy *qphy = phy_get_drvdata(phy); - struct qcom_qmp *qmp = qphy->qmp; - qmp->mode = mode; + qphy->mode = mode; return 0; } @@ -2816,8 +2815,8 @@ static void qcom_qmp_phy_enable_autonomous_mode(struct qmp_phy *qphy) void __iomem *pcs_misc = qphy->pcs_misc; u32 intr_mask; - if (qmp->mode == PHY_MODE_USB_HOST_SS || - qmp->mode == PHY_MODE_USB_DEVICE_SS) + if (qphy->mode == PHY_MODE_USB_HOST_SS || + qphy->mode == PHY_MODE_USB_DEVICE_SS) intr_mask = ARCVR_DTCT_EN | ALFPS_DTCT_EN; else intr_mask = ARCVR_DTCT_EN | ARCVR_DTCT_EVENT_SEL; @@ -2863,7 +2862,7 @@ static int __maybe_unused qcom_qmp_phy_runtime_suspend(struct device *dev) struct qmp_phy *qphy = qmp->phys[0]; const struct qmp_phy_cfg *cfg = qmp->cfg; - dev_vdbg(dev, "Suspending QMP phy, mode:%d\n", qmp->mode); + dev_vdbg(dev, "Suspending QMP phy, mode:%d\n", qphy->mode); /* Supported only for USB3 PHY */ if (cfg->type != PHY_TYPE_USB3) @@ -2889,7 +2888,7 @@ static int __maybe_unused qcom_qmp_phy_runtime_resume(struct device *dev) const struct qmp_phy_cfg *cfg = qmp->cfg; int ret = 0; - dev_vdbg(dev, "Resuming QMP phy, mode:%d\n", qmp->mode); + dev_vdbg(dev, "Resuming QMP phy, mode:%d\n", qphy->mode); /* Supported only for USB3 PHY */ if (cfg->type != PHY_TYPE_USB3) -- Sent by a computer, using git, on the internet