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Wed, 26 Aug 2020 06:48:48 +0000 From: peng.fan@nxp.com To: sboyd@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, abel.vesa@nxp.com, Anson.Huang@nxp.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Peng Fan Subject: [PATCH] clk: imx: fix composite peripheral flags Date: Wed, 26 Aug 2020 15:14:07 +0800 Message-Id: <20200826071407.10543-1-peng.fan@nxp.com> X-Mailer: git-send-email 2.28.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SG2PR01CA0157.apcprd01.prod.exchangelabs.com (2603:1096:4:28::13) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by SG2PR01CA0157.apcprd01.prod.exchangelabs.com (2603:1096:4:28::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3326.19 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: yzULdGE59EDfb394uPFUIPV2bnb4/i4ztlA8jx1IIA3yRTThrI2igdaVtm6u6/FbW78+BGQYowDsDIbgCDtcQbjX9lznLPXJqeN9Ytx690Lj1aBW4Ks23M85vt3mNsSe137weUfrUyIL4okrz4Yz/vIY3rueOe3cyt+n4eP2MymEc5zAGc+vCM+fqo5LoTOcsH6XmQAsWLDA6L+MKZOG2ixSBOBr9qavIE845GqyLyKObs5xCgh6RhoFnXBuZ6gXNa4yVOic2UF0Tsx2+eyWTCUJWpN2WifASy0bHyFk21TPXKE6M/tAlsd8tTJulKbLOWSgoDwQ+L92BPJqWsAxRcL9rIjT42l+0nuAdKk3VxCTShn4ix8nuSSk4CkKGZ5QaNoTQ18behr1MVmmZ7HtiBshehklSvutWiznju6qDbTFxRzUB32UbBVnhGILdNHLGRhyhlVEyB74jEReTXN3OsriyDrbAtL/Lcalwv8myaelOo75FibdSOB2rDH1FA2SregpMvwrWEIvN1lLlAtF+P02jbcp2Lt05rGhDWTWUXqsoSm61p+ZUr7+reM8G0vBN1DlCi8CiTguyZziAUlRYJTK/IpX6M+payVJ8/+IWnSivTW841lQQI3Q+0bnngdJ7Oj/byqp6t+N0SEzUUwh0g== X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: f22abe26-19e2-4602-c4ab-08d8498c1565 X-MS-Exchange-CrossTenant-AuthSource: DB6PR0402MB2760.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Aug 2020 06:48:47.9913 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: dgal6Y6d32D2/4EsELrK72v2qlFxN8v9nocThF1rFEPjOhmsWXI+Jt8R4VEJCbsjC+/7HNSjRi6bGnr/NiY+fw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB7PR04MB4092 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Peng Fan According to RM, for peripheral clock slice, "IP clock slices must be stopped to change the clock source.". So we must have CLK_SET_PARENT_GATE flag to avoid glitch. Signed-off-by: Peng Fan --- drivers/clk/imx/clk-composite-8m.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c index 78fb7e52a42a..2c309e3dc8e3 100644 --- a/drivers/clk/imx/clk-composite-8m.c +++ b/drivers/clk/imx/clk-composite-8m.c @@ -216,6 +216,7 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char *name, div->width = PCG_PREDIV_WIDTH; divider_ops = &imx8m_clk_composite_divider_ops; mux_ops = &clk_mux_ops; + flags |= CLK_SET_PARENT_GATE; } div->lock = &imx_ccm_lock; -- 2.28.0