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[23.128.96.18]) by mx.google.com with ESMTP id r10si1351906eds.138.2020.08.26.06.14.43; Wed, 26 Aug 2020 06:15:08 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=fail header.i=@tq-group.com header.s=key1 header.b=K4A081Ip; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729568AbgHZNN3 (ORCPT + 99 others); Wed, 26 Aug 2020 09:13:29 -0400 Received: from mx1.tq-group.com ([62.157.118.193]:11356 "EHLO mx1.tq-group.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729177AbgHZNN0 (ORCPT ); Wed, 26 Aug 2020 09:13:26 -0400 IronPort-SDR: pFmwl+dBjkX+0lVomhiKnC0L895FpwSD9mrbpFhhSWCwUlbed90E4e+M4hocR6rJWI8E+fYOi9 asKOJibFU0c4wM68W+/1L8tzMq0lkkhePcamptJ0BelKlSDX3EjVU2G4Cb9v8FP/7R4M1Qd/0Q KWCEspmLCZhGeh6nR0sK6NTVlzv0m/Oe93Xui84afs9QcniTZoQLngN9PDBMGgiEigN0CUHokT 0TZJ05evt4mvhxH3MBFVL6QyZCGbncWMsIHJIxGoO4fYIf2Zy13ueBCxAwpRUhRGsQzYrT105d 7ck= X-IronPort-AV: E=Sophos;i="5.76,355,1592863200"; d="scan'208";a="13609275" Received: from unknown (HELO tq-pgp-pr1.tq-net.de) ([192.168.6.15]) by mx1-pgp.tq-group.com with ESMTP; 26 Aug 2020 15:13:24 +0200 Received: from mx1.tq-group.com ([192.168.6.7]) by tq-pgp-pr1.tq-net.de (PGP Universal service); Wed, 26 Aug 2020 15:13:24 +0200 X-PGP-Universal: processed; by tq-pgp-pr1.tq-net.de on Wed, 26 Aug 2020 15:13:24 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1598447604; x=1629983604; h=message-id:subject:from:to:cc:date:in-reply-to: references:mime-version:content-transfer-encoding; bh=KVe1P5ErSIxwMjJGwp2tRmMWUftzZryOsrNozm2qIy0=; b=K4A081IpBbZWhGUycqChqEwWmyVhD9+05oMM7EO3K6e2Jvg35Spf+nte Vx9s6I5plKOF9KHoS3mjoS1c+sgRnbRPluV+C3yZEcmr1HSbtOSYXI2q2 Is6bDY0BiXrXPUUQyvxhybO2woQ2nQfJ9yDUkCmA4SYRaaqy0KfOq2Y3t iYL6762wSEGjcimJeK5bHDslYeZo5LcumazL0lgzAMz+aYXV0kKYIuNIX ImxeTvYgzIxt9a78vfkkRRG8rN40Y5EwhpoghMaqgomXzR8Unov9we4eC oIU2ArKFRe8sxdqzcjU1hY45W+BjxHqF+HfoqbyzeYshxXgDYQyGpDDkZ g==; IronPort-SDR: 4jgI/O/kR2YJg5j4IVecx0LZX8tFwJOl/FrgdpzBRkAlC9iCV8r2+WC+OkypgW1jqQR5HEvL+o E0sPei3L4tYGRomn03HTtIuz0W/TMntlLzh2ThnmA1Kr3w4+9ajuOrAVLWQokj+1bmNenlxzTJ 68ljiby78ubfWza0fEaqyJ1vsWHRcH/07ttwN8kRp3/q35cntao3xgQ34Ot0uY/MRgGYDkiFoa qjb9xXqjY22nLDFGZGovAAybDef+E0JHN9nFUkx07o0eacKvkNof6+6o0kFlH/y0bfhqLN9aiS pGo= X-IronPort-AV: E=Sophos;i="5.76,355,1592863200"; d="scan'208";a="13609274" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 26 Aug 2020 15:13:24 +0200 Received: from schifferm-ubuntu4.tq-net.de (schifferm-ubuntu4.tq-net.de [10.117.49.26]) by vtuxmail01.tq-net.de (Postfix) with ESMTPA id 5BA71280065; Wed, 26 Aug 2020 15:13:24 +0200 (CEST) Message-ID: Subject: Re: (EXT) Re: (EXT) Re: (EXT) Re: (EXT) Re: (EXT) Re: [PATCH 2/2] ARM: dts: imx6qdl: tqma6: minor fixes From: Matthias Schiffer To: Fabio Estevam Cc: Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , NXP Linux Team , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , linux-kernel Date: Wed, 26 Aug 2020 15:13:22 +0200 In-Reply-To: References: <20200824091013.20640-1-matthias.schiffer@ew.tq-group.com> <20200824091013.20640-2-matthias.schiffer@ew.tq-group.com> <4b7d57738ce8e2130c4740a0f3f973fbaf60a7cf.camel@ew.tq-group.com> <7a59492e46f34d213b83f7182c7db73954c5a9c7.camel@ew.tq-group.com> <53f5f17735fc2f0ca061a321969bbb131e55efff.camel@ew.tq-group.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 2020-08-26 at 10:01 -0300, Fabio Estevam wrote: > On Wed, Aug 26, 2020 at 8:54 AM Matthias Schiffer > wrote: > > > Before 8cdcd8aeee281, num_chipselect was set to 3 for spi0 and to 1 > > for > > spi1 in arch/arm/mach-imx/mach-mx31lite.c. My understanding is that > > it > > would make sense to add this as num-cs to > > arch/arm/boot/dts/imx31-lite.dts. > > Or just pass cs-gpios instead? Using GPIOs for chipselect would require different pinmuxing. Also, why use GPIOs, when the SPI controller has this built in?