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To:     "Dey\, Megha" <megha.dey@intel.com>,
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Subject: Re: [patch V2 15/46] x86/irq: Consolidate DMAR irq allocation
In-Reply-To: <812d9647-ad2e-95e9-aa99-b54ff7ebc52d@intel.com>
References: <20200826111628.794979401@linutronix.de> <20200826112332.163462706@linutronix.de> <812d9647-ad2e-95e9-aa99-b54ff7ebc52d@intel.com>
Date:   Wed, 26 Aug 2020 20:32:00 +0200
Message-ID: <878se1uulb.fsf@nanos.tec.linutronix.de>
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On Wed, Aug 26 2020 at 09:50, Megha Dey wrote:
>> @@ -329,15 +329,15 @@ static struct irq_chip dmar_msi_controll
>>   static irq_hw_number_t dmar_msi_get_hwirq(struct msi_domain_info *info,
>>   					  msi_alloc_info_t *arg)
>>   {
>> -	return arg->dmar_id;
>> +	return arg->hwirq;
>
> Shouldn't this return the arg->devid which gets set in dmar_alloc_hwirq?

Indeed.