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Wed, 26 Aug 2020 23:40:23 -0500 Received: from [10.24.69.20] (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 07R4eGx8047454; Wed, 26 Aug 2020 23:40:19 -0500 Subject: Re: [PATCH 1/4] dt-bindings: arm: ti: Add bindings for J7200 SoC To: Nishanth Menon CC: Tero Kristo , Nishanth Menon , Rob Herring , Grygorii Strashko , Sekhar Nori , , Kishon Vijay Abraham I , Linux ARM Mailing List References: <20200723084628.19241-1-lokeshvutla@ti.com> <20200723084628.19241-2-lokeshvutla@ti.com> <20200827002318.fumzb3w7ekciffua@ogun.localdomain> From: Lokesh Vutla Message-ID: <9650cb95-0c08-c0a5-8a21-7bba3f361f2c@ti.com> Date: Thu, 27 Aug 2020 10:10:16 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: <20200827002318.fumzb3w7ekciffua@ogun.localdomain> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Nishanth, On 27/08/20 5:53 am, Nishanth Menon wrote: > On 14:16-20200723, Lokesh Vutla wrote: >> The J7200 SoC is a part of the K3 Multicore SoC architecture platform. >> It is targeted for automotive gateway, vehicle compute systems, >> Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications. >> The SoC aims to meet the complex processing needs of modern embedded >> products. >> >> Some highlights of this SoC are: >> * Dual Cortex-A72s in a single cluster, two clusters of lockstep >> capable dual Cortex-R5F MCUs and a Centralized Device Management and >> Security Controller (DMSC). >> * Configurable L3 Cache and IO-coherent architecture with high data >> throughput capable distributed DMA architecture under NAVSS. >> * Integrated Ethernet switch supporting up to a total of 4 external ports >> in addition to legacy Ethernet switch of up to 2 ports. >> * Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems, >> 20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and >> I2C, eCAP/eQEP, eHRPWM among other peripherals. >> * One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL >> management. >> >> See J7200 Technical Reference Manual (SPRUIU1, June 2020) >> for further details: https://www.ti.com/lit/pdf/spruiu1 >> >> Signed-off-by: Lokesh Vutla >> --- >> Documentation/devicetree/bindings/arm/ti/k3.txt | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/arm/ti/k3.txt b/Documentation/devicetree/bindings/arm/ti/k3.txt >> index 333e7256126a..33419cce0afa 100644 >> --- a/Documentation/devicetree/bindings/arm/ti/k3.txt >> +++ b/Documentation/devicetree/bindings/arm/ti/k3.txt >> @@ -16,6 +16,9 @@ architecture it uses, using one of the following compatible values: >> - J721E >> compatible = "ti,j721e"; >> >> +- J7200 >> + compatible = "ti,j7200"; >> + >> Boards >> ------ > > Lets convert the k3.txt to k3.yaml before we do anything more here. > Looking at the full series, I see that there are pending comments from okay, I can switch Patch 1 and 2. > Grygorii as well which needs to be looked at. I have'nt seen a follow up > version since this version. Grygorii replied to the same asking to ignore his mail[0] [0] https://patchwork.kernel.org/cover/11680441/ Thanks and regards, Lokesh > > [1] https://lore.kernel.org/linux-arm-kernel/20200723084628.19241-1-lokeshvutla@ti.com/ >