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References: <CGME20200826171539eucas1p2e999972d3e7dd6dd701e312548933e87@eucas1p2.samsung.com>
 <20200826171529.23618-1-s.nawrocki@samsung.com>
In-Reply-To: <20200826171529.23618-1-s.nawrocki@samsung.com>
From:   Chanwoo Choi <chanwoo@kernel.org>
Date:   Sat, 29 Aug 2020 21:46:28 +0900
Message-ID: <CAGTfZH1Pzs3W4d-3+wNFw4PZVa4KD-2qEdD=oXTHyPRLPeUwBg@mail.gmail.com>
Subject: Re: [PATCH 1/3] clk: samsung: Add clk ID definitions for the CPU
 parent clocks
To:     Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc:     linux-clk@vger.kernel.org, Tomasz Figa <tomasz.figa@gmail.com>,
        Chanwoo Choi <cw00.choi@samsung.com>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>, Kukjin Kim <kgene@kernel.org>,
        Krzysztof Kozlowski <krzk@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        linux-samsung-soc <linux-samsung-soc@vger.kernel.org>,
        linux-kernel <linux-kernel@vger.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
        devicetree <devicetree@vger.kernel.org>,
        Marek Szyprowski <m.szyprowski@samsung.com>,
        Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
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Sender: linux-kernel-owner@vger.kernel.org
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Hi Sylwester,

On Thu, Aug 27, 2020 at 2:16 AM Sylwester Nawrocki
<s.nawrocki@samsung.com> wrote:
>
> Add clock ID definitions for the CPU parent clocks for SoCs
> which don't have such definitions yet. This will allow us to
> reference the parent clocks directly by cached struct clk_hw
> pointers in the clock provider, rather than doing clk lookup
> by name.
>
> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> ---
>  include/dt-bindings/clock/exynos5250.h | 4 +++-
>  include/dt-bindings/clock/exynos5420.h | 5 +++++
>  2 files changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/include/dt-bindings/clock/exynos5250.h b/include/dt-bindings/clock/exynos5250.h
> index bc8a3c5..e259cc0 100644
> --- a/include/dt-bindings/clock/exynos5250.h
> +++ b/include/dt-bindings/clock/exynos5250.h
> @@ -172,8 +172,10 @@
>  #define CLK_MOUT_GPLL          1025
>  #define CLK_MOUT_ACLK200_DISP1_SUB     1026
>  #define CLK_MOUT_ACLK300_DISP1_SUB     1027
> +#define CLK_MOUT_APLL          1028
> +#define CLK_MOUT_MPLL          1029
>
>  /* must be greater than maximal clock id */
> -#define CLK_NR_CLKS            1028
> +#define CLK_NR_CLKS            1030
>
>  #endif /* _DT_BINDINGS_CLOCK_EXYNOS_5250_H */
> diff --git a/include/dt-bindings/clock/exynos5420.h b/include/dt-bindings/clock/exynos5420.h
> index ff917c8..9fffc6c 100644
> --- a/include/dt-bindings/clock/exynos5420.h
> +++ b/include/dt-bindings/clock/exynos5420.h
> @@ -231,6 +231,11 @@
>  #define CLK_MOUT_SCLK_SPLL     660
>  #define CLK_MOUT_MX_MSPLL_CCORE_PHY    661
>  #define CLK_MOUT_SW_ACLK_G3D   662
> +#define CLK_MOUT_APLL          663
> +#define CLK_MOUT_MSPLL_CPU     664
> +#define CLK_MOUT_KPLL          665
> +#define CLK_MOUT_MSPLL_KFC     666
> +
>
>  /* divider clocks */
>  #define CLK_DOUT_PIXEL         768
> --
> 2.7.4
>

Acked-by: Chanwoo Choi <cw00.choi@samsung.com>

-- 
Best Regards,
Chanwoo Choi
Samsung Electronics