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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id dm22sm69847edb.49.2020.08.29.13.31.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 29 Aug 2020 13:31:42 -0700 (PDT) Subject: Re: [PATCH v2 2/7] arm64: dts: rockchip: px30: Add Engicam EDIMM2.2 Starter Kit To: Jagan Teki , Heiko Stuebner , Rob Herring Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Suniel Mahesh , Michael Trimarchi , linux-amarula , linux-arm-kernel@lists.infradead.org References: <20200829155823.247360-1-jagan@amarulasolutions.com> <20200829155823.247360-3-jagan@amarulasolutions.com> From: Johan Jonker Message-ID: <25b87188-bd06-90da-b2ce-bbfdb716e00a@gmail.com> Date: Sat, 29 Aug 2020 22:31:40 +0200 User-Agent: Mozilla/5.0 (X11; Linux i686; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 MIME-Version: 1.0 In-Reply-To: <20200829155823.247360-3-jagan@amarulasolutions.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Jagan, On 8/29/20 5:58 PM, Jagan Teki wrote: > Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive > Evaluation Board. > > Genaral features: > - LCD 7" C.Touch > - microSD slot > - Ethernet 1Gb > - Wifi/BT > - 2x LVDS Full HD interfaces > - 3x USB 2.0 > - 1x USB 3.0 > - HDMI Out > - Mini PCIe > - MIPI CSI > - 2x CAN > - Audio Out > > SOM's like PX30.Core needs to mount on top of this Evaluation board > for creating complete PX30.Core EDIMM2.2 Starter Kit. > > Add support for it. > > Signed-off-by: Jagan Teki > --- > Changes for v2: > - move carrier enablement nodes in carrier dtsi > > .../dts/rockchip/px30-engicam-common.dtsi | 39 +++++++++++++++++++ > .../dts/rockchip/px30-engicam-edimm2.2.dtsi | 7 ++++ > 2 files changed, 46 insertions(+) > create mode 100644 arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi > create mode 100644 arch/arm64/boot/dts/rockchip/px30-engicam-edimm2.2.dtsi > > diff --git a/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi b/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi > new file mode 100644 > index 000000000000..4e85c1a690e5 > --- /dev/null > +++ b/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi > @@ -0,0 +1,39 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2020 Engicam srl > + * Copyright (c) 2020 Amarula Solutions(India) > + */ > + > +/ { > + vcc5v0_sys: vcc5v0-sys { > + compatible = "regulator-fixed"; Just one of the exceptions to the sort rule... regulator-name = "vcc5v0_sys"; /* +5V */ > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + regulator-name = "vcc5v0_sys"; /* +5V */ Move on top of the other regulator properties. Same goes for the regulators in px30-px30-core.dtsi. > + }; > +}; > + > +&gmac { > + clock_in_out = "output"; > + phy-supply = <&vcc_3v3>; /* +3V3_SOM */ > + snps,reset-active-low; > + snps,reset-delays-us = <0 50000 50000>; > + snps,reset-gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; > + status = "okay"; > +}; > + > +&sdmmc { > + cap-mmc-highspeed; Remove. Board only has a micro-SD card. > + cap-sd-highspeed; > + card-detect-delay = <800>; > + vqmmc-supply = <&vcc_3v3>; > + vmmc-supply = <&vcc_3v3>; /* +3V3_SOM */ sort > + status = "okay"; > +}; > + > +&uart2 { > + pinctrl-0 = <&uart2m1_xfer>; > + status = "okay"; > +}; > diff --git a/arch/arm64/boot/dts/rockchip/px30-engicam-edimm2.2.dtsi b/arch/arm64/boot/dts/rockchip/px30-engicam-edimm2.2.dtsi > new file mode 100644 > index 000000000000..cb00988953e9 > --- /dev/null > +++ b/arch/arm64/boot/dts/rockchip/px30-engicam-edimm2.2.dtsi > @@ -0,0 +1,7 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2020 Engicam srl > + * Copyright (c) 2020 Amarula Solutions(India) > + */ > + > +#include "px30-engicam-common.dtsi" >