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Mon, 31 Aug 2020 09:49:39 +0000 (GMT) Received: from eusmgms1.samsung.com (unknown [182.198.249.179]) by eusmtrp2.samsung.com (KnoxPortal) with ESMTP id 20200831094938eusmtrp2d3570df0e69075b2b2813dfcc044096c~wUWj4Ka5s0051400514eusmtrp2q; Mon, 31 Aug 2020 09:49:38 +0000 (GMT) X-AuditID: cbfec7f5-371ff700000018ae-fc-5f4cc7b368ea Received: from eusmtip1.samsung.com ( [203.254.199.221]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id BB.18.06314.2B7CC4F5; Mon, 31 Aug 2020 10:49:38 +0100 (BST) Received: from [106.210.88.143] (unknown [106.210.88.143]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20200831094938eusmtip1eba73822856501d325cefa8447c7c4d9~wUWjTK54y2769427694eusmtip1f; Mon, 31 Aug 2020 09:49:38 +0000 (GMT) Subject: Re: [PATCH 06/33] ARM: dts: exynos: Correct S3C RTC bindings and enable it in Universal C210 To: Krzysztof Kozlowski , Rob Herring , Kukjin Kim , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Denis GNUtoo Carikli , Simon Shields Cc: Bartlomiej Zolnierkiewicz , Sylwester Nawrocki From: Marek Szyprowski Message-ID: <3865eabe-7d20-0c5a-9458-0a49d7f3e292@samsung.com> Date: Mon, 31 Aug 2020 11:49:38 +0200 User-Agent: Mozilla/5.0 (Windows NT 10.0; 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charset="utf-8" X-RootMTR: 20200830135416eucas1p2359bfac5c025c5c470a736cc830969fe X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20200830135416eucas1p2359bfac5c025c5c470a736cc830969fe References: <20200830135200.24304-1-krzk@kernel.org> <20200830135200.24304-6-krzk@kernel.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 30.08.2020 15:51, Krzysztof Kozlowski wrote: > The S3C RTC requires 32768 Hz clock as input which is provided by PMIC. > However there is no clock provided for the PMIC and the driver registers > the clock as regulator. This is an old driver which will not be updated > so add a workaround - add a fixed-clock to fill missing clock phandle > reference in S3C RTC. The "clock" regulator in PMIC is already present > and enabled. > > This allows to enable the S3C RTC and fixes dtbs_check warnings: > > arch/arm/boot/dts/exynos4210-universal_c210.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short > arch/arm/boot/dts/exynos4210-universal_c210.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short > > Signed-off-by: Krzysztof Kozlowski Confirmed, this workaround enables s3c-rtc driver operation on this board. Tested-by: Marek Szyprowski > --- > arch/arm/boot/dts/exynos4210-universal_c210.dts | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts > index 99ce53b120ac..9479e41bdc2a 100644 > --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts > +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts > @@ -39,6 +39,13 @@ > compatible = "samsung,clock-xusbxti"; > clock-frequency = <24000000>; > }; > + > + pmic_ap_clk: pmic-ap-clk { > + /* Workaround for missing clock on PMIC */ > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <32768>; > + }; > }; > > vemmc_reg: voltage-regulator { > @@ -537,6 +544,12 @@ > status = "okay"; > }; > > +&rtc { > + status = "okay"; > + clocks = <&clock CLK_RTC>, <&pmic_ap_clk>; > + clock-names = "rtc", "rtc_src"; > +}; > + > &sdhci_0 { > bus-width = <8>; > non-removable; Best regards -- Marek Szyprowski, PhD Samsung R&D Institute Poland