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Mon, 31 Aug 2020 09:49:13 +0000 (GMT) Received: from eusmgms1.samsung.com (unknown [182.198.249.179]) by eusmtrp2.samsung.com (KnoxPortal) with ESMTP id 20200831094913eusmtrp2906a8f1253b51a972187285a448b53b1~wUWLs4mt-0051400514eusmtrp2E; Mon, 31 Aug 2020 09:49:13 +0000 (GMT) X-AuditID: cbfec7f5-38bff700000018ae-a9-5f4cc7992621 Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 82.18.06314.897CC4F5; Mon, 31 Aug 2020 10:49:13 +0100 (BST) Received: from [106.210.88.143] (unknown [106.210.88.143]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20200831094912eusmtip2ff3fefbd61b7ad66690e10572f12302a~wUWLJSGof0559205592eusmtip2I; Mon, 31 Aug 2020 09:49:12 +0000 (GMT) Subject: Re: [PATCH 04/33] ARM: dts: exynos: Correct S3C RTC bindings and enable it in Origen To: Krzysztof Kozlowski , Rob Herring , Kukjin Kim , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Denis GNUtoo Carikli , Simon Shields Cc: Bartlomiej Zolnierkiewicz , Sylwester Nawrocki From: Marek Szyprowski Message-ID: <6bebd580-d6c6-bb2f-6dd4-383072e7bde5@samsung.com> Date: Mon, 31 Aug 2020 11:49:12 +0200 User-Agent: Mozilla/5.0 (Windows NT 10.0; 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charset="utf-8" X-RootMTR: 20200830135409eucas1p2ceba4383b440bb9398136a42285f82c3 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20200830135409eucas1p2ceba4383b440bb9398136a42285f82c3 References: <20200830135200.24304-1-krzk@kernel.org> <20200830135200.24304-4-krzk@kernel.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 30.08.2020 15:51, Krzysztof Kozlowski wrote: > The S3C RTC requires 32768 Hz clock as input which is provided by PMIC > (Maxim MAX8997). However there is no clock provided for the PMIC and > the driver registers the clock as regulator. This is an old driver > which will not be updated so add a workaround: > 1. Enable the "clock" regulator in PMIC, > 2. Add a fixed-clock to fill missing clock phandle reference in S3C RTC. > > This allows to enable the S3C RTC and fixes dtbs_check warnings: > > arch/arm/boot/dts/exynos4210-origen.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short > arch/arm/boot/dts/exynos4210-origen.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short > > Signed-off-by: Krzysztof Kozlowski Confirmed, this workaround enables s3c-rtc driver operation on this board. Tested-by: Marek Szyprowski > --- > arch/arm/boot/dts/exynos4210-origen.dts | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts > index 890525b10d22..747221bbb856 100644 > --- a/arch/arm/boot/dts/exynos4210-origen.dts > +++ b/arch/arm/boot/dts/exynos4210-origen.dts > @@ -100,6 +100,13 @@ > compatible = "samsung,clock-xusbxti"; > clock-frequency = <24000000>; > }; > + > + pmic_ap_clk: pmic-ap-clk { > + /* Workaround for missing clock on max8997 PMIC */ > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <32768>; > + }; > }; > > display-timings { > @@ -286,6 +293,11 @@ > regulator-boot-on; > regulator-always-on; > }; > + > + EN32KHZ_AP { > + regulator-name = "EN32KHZ_AP"; > + regulator-always-on; > + }; > }; > }; > }; > @@ -331,6 +343,8 @@ > > &rtc { > status = "okay"; > + clocks = <&clock CLK_RTC>, <&pmic_ap_clk>; > + clock-names = "rtc", "rtc_src"; > }; > > &tmu { Best regards -- Marek Szyprowski, PhD Samsung R&D Institute Poland