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Date:   Mon, 31 Aug 2020 15:04:38 +0200
From:   Maxime Ripard <maxime@cerno.tech>
To:     Paul Kocialkowski <paul.kocialkowski@bootlin.com>
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Subject: Re: [PATCH v2 0/4] Support of MIPI CSI-2 for A83T
Message-ID: <20200831130438.5j237mntivrw3cwo@gilmour.lan>
References: <20200828131737.12483-1-kevin.lhopital@bootlin.com>
 <20200828141203.GC6858@aptenodytes>
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Hi Paul,

On Fri, Aug 28, 2020 at 04:12:03PM +0200, Paul Kocialkowski wrote:
> Hi everyone,
>=20
> On Fri 28 Aug 20, 15:17, K=E9vin L'h=F4pital wrote:
> > This series adds the support for the MIPI CSI-2 controller for the A83T=
 SoC.
> > The CSI controller is the same as the V3s SoC that's why I put the A83T
> > MIPI CSI-2 driver in sun6i-csi.
> > My work is based on the Allwinner BSP for A83T and also on MIPI CSI-2
> > specification for the A83T given by Allwinner.
>=20
> To give a bit of context here, Kevin is our intern who worked on MIPI CSI=
-2
> support on the A83t this summer. As we were approaching the end of the
> internship, we wanted to publish the current state of the work as a worki=
ng
> reference and base for mainline support.
>=20
> However, we are well aware that there are significant design issues in th=
is
> series, such as:
> - not supporting the fwnode graph;
> - not working with the DPHY API;
> - adding MIPI CSI-2 support under the same dt compatible as parallel CSI;
>=20
> and probably other things.
>=20
> Bootlin is currently working on V3s MIPI CSI-2 support and we intend to r=
espin
> this series when submitting V3s MIPI CSI-2 support, with fixes to these d=
esign
> issues.

It's great to have that clarification, but it really doesn't address any
of the questions I had in the v1:

> There's a bunch of things that would need to be explained and / or
> argued for here, in particular:
>   - Why did you need to plumb it into sun6i-csi?
>   - You're naming the CSI part as the A83t CSI, while MIPI-CSI has been
>     supported since the A31(?), is there a reason for that?
>   - This is not documented anywhere, what did you base this work on?

You're also mentioning the v3s, without really stating why this driver
wouldn't be able to drive it.

> So we hope you keep this in mind when reviewing the series, which is
> not meant to be merged in its current state.

I mean, if the current code needs to be redesigned, and you provide no
details whatsoever on the hardware, I'm not really sure what kind of
input you're expecting.

Maxime

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