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From:   Leo Yan <leo.yan@linaro.org>
To:     Arnaldo Carvalho de Melo <acme@kernel.org>,
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Cc:     Leo Yan <leo.yan@linaro.org>
Subject: [PATCH v2 14/14] perf mem: Document options introduced by Arm SPE
Date:   Tue,  1 Sep 2020 09:38:15 +0100
Message-Id: <20200901083815.13755-15-leo.yan@linaro.org>
In-Reply-To: <20200901083815.13755-1-leo.yan@linaro.org>
References: <20200901083815.13755-1-leo.yan@linaro.org>
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

Document new options which is introduced by Arm SPE, the event type
'ldst' is added for recording both load and store memory operations;
and adds the information for '--itrace=M' which can be used to
synthesize memory samples for Arm SPE.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
 tools/perf/Documentation/perf-mem.txt | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/tools/perf/Documentation/perf-mem.txt b/tools/perf/Documentation/perf-mem.txt
index 199ea0f0a6c0..2455d485044f 100644
--- a/tools/perf/Documentation/perf-mem.txt
+++ b/tools/perf/Documentation/perf-mem.txt
@@ -38,7 +38,12 @@ OPTIONS
 
 -t::
 --type=<type>::
-	Select the memory operation type: load or store (default: load,store)
+	Select the memory operation type: load, store, ldst (default: load,store).
+	The type 'ldst' means the single event can record both for load and store
+	operations; on Intel and PowerPC systems, the types 'load' and 'store' are
+        supported but misses the type 'ldst'; on Arm64 system, it uses SPE AUX
+	trace data to generate memory events, so need to specify one of these
+	three types.
 
 -D::
 --dump-raw-samples::
@@ -84,6 +89,9 @@ RECORD OPTIONS
 --ldlat <n>::
 	Specify desired latency for loads event. (x86 only)
 
+--itrace=M::
+	Synthesize memory samples from the AUX trace data. (Arm SPE only)
+
 In addition, for report all perf report options are valid, and for record
 all perf record options.
 
-- 
2.20.1