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Date:   Thu, 3 Sep 2020 10:23:54 +0800
From:   Leo Yan <leo.yan@linaro.org>
To:     peterz@infradead.org
Cc:     Arnaldo Carvalho de Melo <acme@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Ingo Molnar <mingo@redhat.com>, Wei Li <liwei391@huawei.com>,
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        Namhyung Kim <namhyung@kernel.org>,
        Adrian Hunter <adrian.hunter@intel.com>,
        "Naveen N. Rao" <naveen.n.rao@linux.vnet.ibm.com>,
        Nick Desaulniers <ndesaulniers@google.com>,
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        Kan Liang <kan.liang@linux.intel.com>,
        Will Deacon <will@kernel.org>,
        James Clark <james.clark@arm.com>, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 2/6] perf tsc: Add rdtsc() for Arm64
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 <20200902132131.36304-3-leo.yan@linaro.org>
 <20200902134805.GI1362448@hirez.programming.kicks-ass.net>
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Hi Peter,

On Wed, Sep 02, 2020 at 03:48:05PM +0200, Peter Zijlstra wrote:
> On Wed, Sep 02, 2020 at 02:21:27PM +0100, Leo Yan wrote:
> > The system register CNTVCT_EL0 can be used to retrieve the counter from
> > user space.  Add rdtsc() for Arm64.
> 
> > +u64 rdtsc(void)
> > +{
> > +	u64 val;
> 
> Would it make sense to put a comment in that this counter is/could-be
> 'short' ? Because unlike x86-TSC, this thing isn't architecturally
> specified to be 64bits wide.

Will add below comments:

According to ARM DDI 0487F.c, from Armv8.0 to Armv8.5 inclusive, the
system counter is at least 56 bits wide; from Armv8.6, the counter must
be 64 bits wide.  So the system counter could be less than 64 bits wide
and it is attributed with the flag 'cap_user_time_short' is true.

Thanks for reviewing,
Leo

> 
> > +	asm volatile("mrs %0, cntvct_el0" : "=r" (val));
> > +
> > +	return val;
> > +}
> > -- 
> > 2.17.1
> >