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[34.197.84.77]) by smtp.gmail.com with ESMTPSA id v18sm4724473qtq.15.2020.09.04.08.55.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Sep 2020 08:55:15 -0700 (PDT) From: Bjorn Andersson To: Will Deacon , Robin Murphy , Joerg Roedel , Bjorn Andersson , Sai Prakash Ranjan , Jordan Crouse , Rob Clark Cc: Sibi Sankar , linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v3 1/8] iommu/arm-smmu: Refactor context bank allocation Date: Fri, 4 Sep 2020 15:55:06 +0000 Message-Id: <20200904155513.282067-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200904155513.282067-1-bjorn.andersson@linaro.org> References: <20200904155513.282067-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Extract the conditional invocation of the platform defined alloc_context_bank() to a separate function to keep arm_smmu_init_domain_context() cleaner. Instead pass a reference to the arm_smmu_device as parameter to the call. Also remove the count parameter, as this can be read from the newly passed object. This allows us to not assign smmu_domain->smmu before attempting to allocate the context bank and as such we don't need to roll back this assignment on failure. Signed-off-by: Bjorn Andersson --- Note that this series applies ontop of: https://lore.kernel.org/linux-arm-msm/20200901164707.2645413-1-robdclark@gmail.com/ This could either go on its own, or be squashed with "[PATCH v16 14/20] iommu/arm-smmu: Prepare for the adreno-smmu implementation" from Rob's series. Changes since v2: - New patch drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 6 ++++-- drivers/iommu/arm/arm-smmu/arm-smmu.c | 23 ++++++++++++---------- drivers/iommu/arm/arm-smmu/arm-smmu.h | 3 ++- 3 files changed, 19 insertions(+), 13 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c index 2aa6249050ff..0663d7d26908 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c @@ -91,9 +91,10 @@ static int qcom_adreno_smmu_set_ttbr0_cfg(const void *cookie, } static int qcom_adreno_smmu_alloc_context_bank(struct arm_smmu_domain *smmu_domain, - struct device *dev, int start, int count) + struct arm_smmu_device *smmu, + struct device *dev, int start) { - struct arm_smmu_device *smmu = smmu_domain->smmu; + int count; /* * Assign context bank 0 to the GPU device so the GPU hardware can @@ -104,6 +105,7 @@ static int qcom_adreno_smmu_alloc_context_bank(struct arm_smmu_domain *smmu_doma count = 1; } else { start = 1; + count = smmu->num_context_banks; } return __arm_smmu_alloc_bitmap(smmu->context_map, start, count); diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c index bbec5793faf8..e19d7bdc7674 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c @@ -623,6 +623,16 @@ void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx) arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_SCTLR, reg); } +static int arm_smmu_alloc_context_bank(struct arm_smmu_domain *smmu_domain, + struct arm_smmu_device *smmu, + struct device *dev, unsigned int start) +{ + if (smmu->impl && smmu->impl->alloc_context_bank) + return smmu->impl->alloc_context_bank(smmu_domain, smmu, dev, start); + + return __arm_smmu_alloc_bitmap(smmu->context_map, start, smmu->num_context_banks); +} + static int arm_smmu_init_domain_context(struct iommu_domain *domain, struct arm_smmu_device *smmu, struct device *dev) @@ -741,20 +751,13 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, goto out_unlock; } - smmu_domain->smmu = smmu; - - if (smmu->impl && smmu->impl->alloc_context_bank) - ret = smmu->impl->alloc_context_bank(smmu_domain, dev, - start, smmu->num_context_banks); - else - ret = __arm_smmu_alloc_bitmap(smmu->context_map, start, - smmu->num_context_banks); - + ret = arm_smmu_alloc_context_bank(smmu_domain, smmu, dev, start); if (ret < 0) { - smmu_domain->smmu = NULL; goto out_unlock; } + smmu_domain->smmu = smmu; + cfg->cbndx = ret; if (smmu->version < ARM_SMMU_V2) { cfg->irptndx = atomic_inc_return(&smmu->irptndx); diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.h b/drivers/iommu/arm/arm-smmu/arm-smmu.h index 2df3a70a8a41..ddf2ca4c923d 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.h +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.h @@ -437,7 +437,8 @@ struct arm_smmu_impl { irqreturn_t (*global_fault)(int irq, void *dev); irqreturn_t (*context_fault)(int irq, void *dev); int (*alloc_context_bank)(struct arm_smmu_domain *smmu_domain, - struct device *dev, int start, int max); + struct arm_smmu_device *smmu, + struct device *dev, int start); }; #define INVALID_SMENDX -1 -- 2.28.0