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From:   "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Date:   Fri, 4 Sep 2020 18:24:11 +0100
Message-ID: <CA+V-a8to=PY2_4gHh6V33mRVXJC4QGJzEg2q2NVWzot9TmXAtA@mail.gmail.com>
Subject: Re: [PATCH 2/4] ARM: dts: r8a7742-iwg21d-q7: Add SPI NOR support
To:     Geert Uytterhoeven <geert@linux-m68k.org>
Cc:     Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
        Magnus Damm <magnus.damm@gmail.com>,
        Rob Herring <robh+dt@kernel.org>,
        Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@vger.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
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Hi Geert,

Thank you for the review.

On Thu, Sep 3, 2020 at 12:59 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Tue, Aug 25, 2020 at 6:28 PM Lad Prabhakar
> <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> > Add support for the SPI NOR device which is connected to MSIOF0 interface
> > on the iWave RainboW-G21d-q7 board.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
>
> > --- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
> > +++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
> > @@ -220,6 +220,32 @@
> >         status = "okay";
> >  };
> >
> > +&msiof0 {
> > +       pinctrl-0 = <&msiof0_pins>;
> > +       pinctrl-names = "default";
> > +       cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
> > +
> > +       status = "okay";
> > +
> > +       flash1: flash@0 {
> > +               compatible = "sst,sst25vf016b", "jedec,spi-nor";
> > +               reg = <0>;
> > +               spi-max-frequency = <50000000>;
> > +               m25p,fast-read;
> > +
> > +               partitions {
> > +                       compatible = "fixed-partitions";
> > +                       #address-cells = <1>;
> > +                       #size-cells = <1>;
> > +
> > +                       partition@0 {
> > +                               label = "user";
> > +                               reg = <0x00000000 0x00200000>;
> > +                       };
> > +               };
> > +       };
> > +};
> > +
> >  &pci0 {
> >         pinctrl-0 = <&usb0_pins>;
> >         pinctrl-names = "default";
> > @@ -266,6 +292,11 @@
> >                 function = "i2c2";
> >         };
> >
> > +       msiof0_pins: msiof0 {
> > +               groups = "msiof0_clk", "msiof0_tx", "msiof0_rx";
>
> I think you're missing "msiof0_sync", connected to SPI_CS0#?
>
Agreed will fix that and post a v2.

Cheers,
Prabhakar

> With that fixed:
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> > +               function = "msiof0";
> > +       };
>
> Gr{oetje,eeting}s,
>
>                         Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds