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Mon, 7 Sep 2020 08:51:24 +0000 From: Jianyong Wu To: Marc Zyngier CC: "netdev@vger.kernel.org" , "yangbo.lu@nxp.com" , "john.stultz@linaro.org" , "tglx@linutronix.de" , "pbonzini@redhat.com" , "sean.j.christopherson@intel.com" , "richardcochran@gmail.com" , Mark Rutland , "will@kernel.org" , Suzuki Poulose , Steven Price , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "kvmarm@lists.cs.columbia.edu" , "kvm@vger.kernel.org" , Steve Capper , Justin He , nd Subject: RE: [PATCH v14 08/10] ptp: arm64: Enable ptp_kvm for arm64 Thread-Topic: [PATCH v14 08/10] ptp: arm64: Enable ptp_kvm for arm64 Thread-Index: AQHWgp4Q48WtGxJp4kuFSJTL6o01LqlZ63wAgAL0nPA= Date: Mon, 7 Sep 2020 08:51:23 +0000 Message-ID: References: <20200904092744.167655-1-jianyong.wu@arm.com> <20200904092744.167655-9-jianyong.wu@arm.com> <871rjgmpa5.wl-maz@kernel.org> In-Reply-To: <871rjgmpa5.wl-maz@kernel.org> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ts-tracking-id: A510A2A5DD1BA649A57E134BFC576325.0 x-checkrecipientchecked: true Authentication-Results-Original: kernel.org; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Sep 2020 08:51:34.3479 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7b152d41-dc90-4dee-4711-08d8530b395a X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM5EUR03FT060.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR0801MB1980 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Marc, > -----Original Message----- > From: Marc Zyngier > Sent: Saturday, September 5, 2020 7:33 PM > To: Jianyong Wu > Cc: netdev@vger.kernel.org; yangbo.lu@nxp.com; john.stultz@linaro.org; > tglx@linutronix.de; pbonzini@redhat.com; sean.j.christopherson@intel.com; > richardcochran@gmail.com; Mark Rutland ; > will@kernel.org; Suzuki Poulose ; Steven Price > ; linux-kernel@vger.kernel.org; linux-arm- > kernel@lists.infradead.org; kvmarm@lists.cs.columbia.edu; > kvm@vger.kernel.org; Steve Capper ; Justin He > ; nd > Subject: Re: [PATCH v14 08/10] ptp: arm64: Enable ptp_kvm for arm64 >=20 > On Fri, 04 Sep 2020 10:27:42 +0100, > Jianyong Wu wrote: > > > > Currently, there is no mechanism to keep time sync between guest and > > host in arm64 virtualization environment. Time in guest will drift > > compared with host after boot up as they may both use third party time > > sources to correct their time respectively. The time deviation will be > > in order of milliseconds. But in some scenarios,like in cloud > > envirenment, we ask for higher time precision. > > > > kvm ptp clock, which choose the host clock source as a reference clock > > to sync time between guest and host, has been adopted by x86 which > > makes the time sync order from milliseconds to nanoseconds. > > > > This patch enables kvm ptp clock for arm64 and improve clock sync > > precison significantly. > > > > Test result comparisons between with kvm ptp clock and without it in > > arm64 are as follows. This test derived from the result of command > > 'chronyc sources'. we should take more care of the last sample column > > which shows the offset between the local clock and the source at the la= st > measurement. > > > > no kvm ptp in guest: > > MS Name/IP address Stratum Poll Reach LastRx Last sample > > > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > ^* dns1.synet.edu.cn 2 6 377 13 +1040us[+1581us] +/- 21m= s > > ^* dns1.synet.edu.cn 2 6 377 21 +1040us[+1581us] +/- 21m= s > > ^* dns1.synet.edu.cn 2 6 377 29 +1040us[+1581us] +/- 21m= s > > ^* dns1.synet.edu.cn 2 6 377 37 +1040us[+1581us] +/- 21m= s > > ^* dns1.synet.edu.cn 2 6 377 45 +1040us[+1581us] +/- 21m= s > > ^* dns1.synet.edu.cn 2 6 377 53 +1040us[+1581us] +/- 21m= s > > ^* dns1.synet.edu.cn 2 6 377 61 +1040us[+1581us] +/- 21m= s > > ^* dns1.synet.edu.cn 2 6 377 4 -130us[ +796us] +/- 21m= s > > ^* dns1.synet.edu.cn 2 6 377 12 -130us[ +796us] +/- 21m= s > > ^* dns1.synet.edu.cn 2 6 377 20 -130us[ +796us] +/- 21m= s > > > > in host: > > MS Name/IP address Stratum Poll Reach LastRx Last sample > > > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > ^* 120.25.115.20 2 7 377 72 -470us[ -603us] +/- 18m= s > > ^* 120.25.115.20 2 7 377 92 -470us[ -603us] +/- 18m= s > > ^* 120.25.115.20 2 7 377 112 -470us[ -603us] +/- 18m= s > > ^* 120.25.115.20 2 7 377 2 +872ns[-6808ns] +/- 17m= s > > ^* 120.25.115.20 2 7 377 22 +872ns[-6808ns] +/- 17m= s > > ^* 120.25.115.20 2 7 377 43 +872ns[-6808ns] +/- 17m= s > > ^* 120.25.115.20 2 7 377 63 +872ns[-6808ns] +/- 17m= s > > ^* 120.25.115.20 2 7 377 83 +872ns[-6808ns] +/- 17m= s > > ^* 120.25.115.20 2 7 377 103 +872ns[-6808ns] +/- 17m= s > > ^* 120.25.115.20 2 7 377 123 +872ns[-6808ns] +/- 17m= s > > > > The dns1.synet.edu.cn is the network reference clock for guest and > > 120.25.115.20 is the network reference clock for host. we can't get > > the clock error between guest and host directly, but a roughly > > estimated value will be in order of hundreds of us to ms. > > > > with kvm ptp in guest: > > chrony has been disabled in host to remove the disturb by network clock= . > > > > MS Name/IP address Stratum Poll Reach LastRx Last sample > > > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > * PHC0 0 3 377 8 -7ns[ +1ns] +/- 3n= s > > * PHC0 0 3 377 8 +1ns[ +16ns] +/- 3n= s > > * PHC0 0 3 377 6 -4ns[ -0ns] +/- 6n= s > > * PHC0 0 3 377 6 -8ns[ -12ns] +/- 5n= s > > * PHC0 0 3 377 5 +2ns[ +4ns] +/- 4n= s > > * PHC0 0 3 377 13 +2ns[ +4ns] +/- 4n= s > > * PHC0 0 3 377 12 -4ns[ -6ns] +/- 4n= s > > * PHC0 0 3 377 11 -8ns[ -11ns] +/- 6n= s > > * PHC0 0 3 377 10 -14ns[ -20ns] +/- 4n= s > > * PHC0 0 3 377 8 +4ns[ +5ns] +/- 4n= s > > > > The PHC0 is the ptp clock which choose the host clock as its source > > clock. So we can see that the clock difference between host and guest > > is in order of ns. > > > > Signed-off-by: Jianyong Wu > > --- > > drivers/clocksource/arm_arch_timer.c | 24 +++++++++++++ > > drivers/ptp/Kconfig | 2 +- > > drivers/ptp/ptp_kvm_arm64.c | 53 > ++++++++++++++++++++++++++++ > > 3 files changed, 78 insertions(+), 1 deletion(-) create mode 100644 > > drivers/ptp/ptp_kvm_arm64.c >=20 > And I missed that one earlier: >=20 > > diff --git a/drivers/clocksource/arm_arch_timer.c > > b/drivers/clocksource/arm_arch_timer.c > > index d55acffb0b90..aaf286e90092 100644 > > --- a/drivers/clocksource/arm_arch_timer.c > > +++ b/drivers/clocksource/arm_arch_timer.c > > @@ -1650,3 +1650,27 @@ static int __init arch_timer_acpi_init(struct > > acpi_table_header *table) } TIMER_ACPI_DECLARE(arch_timer, > > ACPI_SIG_GTDT, arch_timer_acpi_init); #endif > > + > > +#if IS_ENABLED(CONFIG_PTP_1588_CLOCK_KVM) > > +#include >=20 > No conditional includes, please. >=20 Ok. > > +int kvm_arch_ptp_get_crosststamp(unsigned long *cycle, struct > timespec64 *ts, > > + struct clocksource **cs) > > +{ > > + struct arm_smccc_res hvc_res; > > + ktime_t ktime; > > + > > + /* Currently, linux guest will always use the virtual counter */ > > + > arm_smccc_1_1_invoke(ARM_SMCCC_VENDOR_HYP_KVM_PTP_FU > NC_ID, > > + ARM_PTP_VIRT_COUNTER, &hvc_res); >=20 > You don't need to assume anything. This driver already provides you with = the > information you need to tell the hypervisor which counter to > use: >=20 > if (arch_timer_uses_ppi =3D=3D ARCH_TIMER_VIRT_PPI) > ptp_counter =3D ARM_PTP_VIRT_COUNTER; > else > ptp_counter =3D ARM_PTP_PHYS_COUNTER; > arm_smccc_1_1_invoke(ARM_SMCCC_VENDOR_HYP_KVM_PTP_FU > NC_ID, > ptp_counter, &hvc_res); >=20 > At least, this is vaguely future proof. >=20 > The hypervisor will still have to discriminate between a call between a c= all > from vEL1 or vEL2 to decide whether to subtract the offset from the count= er > value, but that's out of scope for now. Very kind of you! Thanks Jianyong=20 >=20 > M. >=20 > -- > Without deviation from the norm, progress is not possible.