Received: by 2002:a05:6a10:22f:0:0:0:0 with SMTP id 15csp3099142pxk; Mon, 7 Sep 2020 03:12:45 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxwaqhCf445aODDG5gS85VMDZuIubLsIpvdFjIe80CgkG1RXGyxwRiJCgUwLBzgzL92T7Qb X-Received: by 2002:a50:f1d1:: with SMTP id y17mr18630295edl.231.1599473565664; Mon, 07 Sep 2020 03:12:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599473565; cv=none; d=google.com; s=arc-20160816; b=h0mgsoNlfuLxb+/z2kU6AksqH7zjFgzt9WT5Lo52ty3bNNWdMb2pfHXzkXsb0KOsFW iswdA1+Nr+vA8jg9wXRVt3hTf0CEvRxcKrrfMdVqvVS4bd5lCAdefJnm/ow/w4i/yC0W 58qmCVskBj9RrOusamlku/6OYPZ/Me8rCHKaiTAzcsM7KTXtWUqqPrC3x26skDk/IOJX ap0JnI2C+jGLz101zJ3nY7Y5EPUb8lZYj3nEGtIOa4PlzJHeUOejXA6Zil8sCNxMVJMs KIrvpbBcM8AO1xMzh7kIHhvHpy621ux3cUZLmm+WuYNUmqV1zgKjYoTwd1WwXujYv7d6 fQTg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=Naad4Ylhb3sMdmWMMtTLq7nNFJzEiUSOGdgQTjkhmBc=; b=CaynaWfrKQ1CYhpEzPGtjbBU6Lwk96OeQm09Y491jus72I6s6EwtoCANjKog7pbQhw g0nIKZcBuM6bDAW7ZsqmnQUGV7zok3c9MkIlbfgOCGE0Y35/pbxNI4zW/rLrNp+HR95V Y52X03Np0RytHMyQ7dxqnKc7vrm9wOFL9P3WF8QY1pBVEX7Z3IQLnmvCyCK65eI+kWm0 WgktyTp6JVOumt3q8TOQ3gJLms5D5rCa9hAdYEEYHoe8TLUKdL12vCci3AaEdb+R1uUd sh8P0Dy5VTkVHcZ5yvFYkoSt4bKs/+HnFzey2OE4W0DBainS7oMBg+suAl4P2pXFqYan 8pZw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id bo22si9160918edb.187.2020.09.07.03.12.23; Mon, 07 Sep 2020 03:12:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728465AbgIGKJK (ORCPT + 99 others); Mon, 7 Sep 2020 06:09:10 -0400 Received: from foss.arm.com ([217.140.110.172]:59534 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728317AbgIGKJH (ORCPT ); Mon, 7 Sep 2020 06:09:07 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8F4FA30E; Mon, 7 Sep 2020 03:09:06 -0700 (PDT) Received: from e121166-lin.cambridge.arm.com (e121166-lin.cambridge.arm.com [10.1.196.255]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9312B3F66E; Mon, 7 Sep 2020 03:09:04 -0700 (PDT) Date: Mon, 7 Sep 2020 11:09:02 +0100 From: Lorenzo Pieralisi To: Lad Prabhakar Cc: Geert Uytterhoeven , Marek Vasut , Yoshihiro Shimoda , Bjorn Helgaas , Rob Herring , Magnus Damm , Kishon Vijay Abraham I , Arnd Bergmann , Greg Kroah-Hartman , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar , Biju Das Subject: Re: [PATCH 0/5] Add PCIe EP nodes on RZ/G2[EMN] Message-ID: <20200907100902.GF6428@e121166-lin.cambridge.arm.com> References: <20200814173037.17822-1-prabhakar.mahadev-lad.rj@bp.renesas.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200814173037.17822-1-prabhakar.mahadev-lad.rj@bp.renesas.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Aug 14, 2020 at 06:30:32PM +0100, Lad Prabhakar wrote: > Hi All, > > This patch series adds support for PCIe EP nodes to Renesas r8a774a1, > r8a774b1 and r8a774c0 SoC's. > > Patches are based on top of [1]. > > [1] https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/ > pci.git/log/?h=next > > Cheers, > Prabhakar > > Lad Prabhakar (5): > dt-bindings: pci: rcar-pci-ep: Document r8a774a1 and r8a774b1 > misc: pci_endpoint_test: Add Device ID for RZ/G2M and RZ/G2N PCIe > controllers > arm64: dts: renesas: r8a774a1: Add PCIe EP nodes > arm64: dts: renesas: r8a774b1: Add PCIe EP nodes > arm64: dts: renesas: r8a774c0: Add PCIe EP node > > .../devicetree/bindings/pci/rcar-pci-ep.yaml | 7 +++- > arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 38 +++++++++++++++++++ > arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 38 +++++++++++++++++++ > arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 19 ++++++++++ > drivers/misc/pci_endpoint_test.c | 7 +++- > 5 files changed, 105 insertions(+), 4 deletions(-) I can take the first two patches but the dts changes should be routed and posted to arm-soc. Lorenzo