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[23.128.96.18]) by mx.google.com with ESMTP id m26si3514093eje.690.2020.09.08.10.14.19; Tue, 08 Sep 2020 10:14:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731811AbgIHRMG (ORCPT + 99 others); Tue, 8 Sep 2020 13:12:06 -0400 Received: from mail.kernel.org ([198.145.29.99]:59170 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731803AbgIHQTT (ORCPT ); Tue, 8 Sep 2020 12:19:19 -0400 Received: from gaia (unknown [46.69.195.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8D4D522B49; Tue, 8 Sep 2020 14:50:22 +0000 (UTC) Date: Tue, 8 Sep 2020 15:50:20 +0100 From: Catalin Marinas To: Andrey Konovalov Cc: Dmitry Vyukov , Vincenzo Frascino , kasan-dev , Andrey Ryabinin , Alexander Potapenko , Marco Elver , Evgenii Stepanov , Elena Petrova , Branislav Rankov , Kevin Brodsky , Will Deacon , Andrew Morton , Linux ARM , Linux Memory Management List , LKML Subject: Re: [PATCH 20/35] arm64: mte: Add in-kernel MTE helpers Message-ID: <20200908145019.GH25591@gaia> References: <2cf260bdc20793419e32240d2a3e692b0adf1f80.1597425745.git.andreyknvl@google.com> <20200827093808.GB29264@gaia> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Sep 08, 2020 at 03:23:20PM +0200, Andrey Konovalov wrote: > On Thu, Aug 27, 2020 at 11:38 AM Catalin Marinas > wrote: > > On Fri, Aug 14, 2020 at 07:27:02PM +0200, Andrey Konovalov wrote: > > > diff --git a/arch/arm64/include/asm/mte.h b/arch/arm64/include/asm/mte.h > > > index 1c99fcadb58c..733be1cb5c95 100644 > > > --- a/arch/arm64/include/asm/mte.h > > > +++ b/arch/arm64/include/asm/mte.h > > > @@ -5,14 +5,19 @@ > > > #ifndef __ASM_MTE_H > > > #define __ASM_MTE_H > > > > > > -#define MTE_GRANULE_SIZE UL(16) > > > +#include > > > > So the reason for this move is to include it in asm/cache.h. Fine by > > me but... > > > > > #define MTE_GRANULE_MASK (~(MTE_GRANULE_SIZE - 1)) > > > #define MTE_TAG_SHIFT 56 > > > #define MTE_TAG_SIZE 4 > > > +#define MTE_TAG_MASK GENMASK((MTE_TAG_SHIFT + (MTE_TAG_SIZE - 1)), MTE_TAG_SHIFT) > > > +#define MTE_TAG_MAX (MTE_TAG_MASK >> MTE_TAG_SHIFT) > > > > ... I'd rather move all these definitions in a file with a more > > meaningful name like mte-def.h. The _asm implies being meant for .S > > files inclusion which isn't the case. > > > > > diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c > > > index eb39504e390a..e2d708b4583d 100644 > > > --- a/arch/arm64/kernel/mte.c > > > +++ b/arch/arm64/kernel/mte.c > > > @@ -72,6 +74,47 @@ int memcmp_pages(struct page *page1, struct page *page2) > > > return ret; > > > } > > > > > > +u8 mte_get_mem_tag(void *addr) > > > +{ > > > + if (system_supports_mte()) > > > + addr = mte_assign_valid_ptr_tag(addr); > > > > The mte_assign_valid_ptr_tag() is slightly misleading. All it does is > > read the allocation tag from memory. > > > > I also think this should be inline asm, possibly using alternatives. > > It's just an LDG instruction (and it saves us from having to invent a > > better function name). > > Could you point me to an example of inline asm with alternatives if > there's any? I see alternative_if and other similar macros used in > arch/arm64/ code, is that what you mean? Those seem to always use > static conditions, like config values, but here we have a dynamic > system_supports_mte(). Could you elaborate on how I should implement > this? There are plenty of ALTERNATIVE macro uses under arch/arm64, see arch/arm64/include/asm/alternative.h for the definition and some simple documentation. In this case, something like (untested, haven't even checked whether it matches the mte_assign_valid_ptr_tag() code): asm(ALTERNATIVE("orr %0, %1, #0xff << 56", "ldg %0, [%1]", ARM64_HAS_MTE)); -- Catalin