Received: by 2002:a05:6a10:22f:0:0:0:0 with SMTP id 15csp4096781pxk; Tue, 8 Sep 2020 10:34:32 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyWzkWBWTvnl39nWAZXvhHjWFq9/uVIQ5qJEYNt3p5Br5WZB7Ietk624dnqCszX9jShvsBe X-Received: by 2002:a17:906:2618:: with SMTP id h24mr25913279ejc.198.1599586472748; Tue, 08 Sep 2020 10:34:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599586472; cv=none; d=google.com; s=arc-20160816; b=n1T2DhVjs9mVCPQ1JpYRrd9+IyeXFjJg25bA8H0d+ltfXGdib3a/GkeXBGgboABcU0 nlDRH/+y0/vFWln71cl7X92GvA90HPFiR/IQ36qyuzfBclT9YHNjsc+L/iwx6jFSPYeN xVeWDsGiWYmftA9GMQGs6K1y6TsDaNwInsD0bg0Nn3u9CCzipil9TCvUghbqIQrBWwiD V+eKINifIY55FV0h74twUvKHtyCbcVZbVRori8e6UG4G7GKOho/+uNDUFAWsj6Dhk2R1 3jBZfcoyvJBK27RhClREnq5IwOTwC0vk0+aIZM7TDRAwfoKIs4kqdvKMz5nx3iTtjbtv /25A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:user-agent:references :in-reply-to:subject:cc:to:from:date:content-transfer-encoding :mime-version:dkim-signature; bh=vohbHx+KdBMX2EzdqSsM6vNF04Tb3ZHZoZ6qz4lcfE0=; b=wM5RoUd+JBGXwMfcD/21H/APEMU+VaKhWQTkwIdu1JJSk+u5GN6vb1xY/zLY4hXmcC BKplVxLije4Q4VoZ/qz9g9yMwlOL2WL6f5NKd4cM06NomVn74epCV9uRU46KFylbzDPh Zrq3EF1OV9KQj5Qp8eC/v2rIU4/dfC8KBD4XTrutod7VKG0V5LoNCPdXr6EYyNzn6gPC j5OvM4qK7da2smlMTybU/cjbmNcEBnHRknBadPghobNpSz3IVQYyOTvhCN/Li18p9Vrs kd99PHvFhLxoC8W9x3EuFGLIUppl9/2EoGcJWMlYkNRJTysegr4/JqQjwmogbrXseoCM 1PpA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@agner.ch header.s=dkim header.b=jGg7ZsMQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id l14si13040810edv.603.2020.09.08.10.34.09; Tue, 08 Sep 2020 10:34:32 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@agner.ch header.s=dkim header.b=jGg7ZsMQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731776AbgIHRdb (ORCPT + 99 others); Tue, 8 Sep 2020 13:33:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56840 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731605AbgIHQPT (ORCPT ); Tue, 8 Sep 2020 12:15:19 -0400 Received: from mail.kmu-office.ch (mail.kmu-office.ch [IPv6:2a02:418:6a02::a2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BF047C061377 for ; Tue, 8 Sep 2020 05:49:32 -0700 (PDT) Received: from webmail.kmu-office.ch (unknown [IPv6:2a02:418:6a02::a3]) by mail.kmu-office.ch (Postfix) with ESMTPSA id 7D87A5C4CC6; Tue, 8 Sep 2020 14:49:29 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=agner.ch; s=dkim; t=1599569369; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=vohbHx+KdBMX2EzdqSsM6vNF04Tb3ZHZoZ6qz4lcfE0=; b=jGg7ZsMQSOgS0AQe0NRuKBfBWFSH3JgUAWrcutRt+bVBtF4Fbjd5pYNqkPx3vn4sbSQuRl oKey2G9a8ErcZm3pODU0VjUg2kmuOpd6DRK00WVlNd0/fzRIQLFXLsq77aKzwZ/ApAhjXA 20GY1GfnHBpIHu0jxOeQJx5HLInt8W0= MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Date: Tue, 08 Sep 2020 14:49:29 +0200 From: Stefan Agner To: Laurent Pinchart Cc: Daniel Vetter , Tomi Valkeinen , Jyri Sarha , Marek Vasut , Dave Airlie , Shawn Guo , Sascha Hauer , Sascha Hauer , Fabio Estevam , dl-linux-imx , dri-devel , Linux ARM , Linux Kernel Mailing List Subject: Re: [PATCH] drm: mxsfb: check framebuffer pitch In-Reply-To: <20200908123304.GG6047@pendragon.ideasonboard.com> References: <20200907160343.124405-1-stefan@agner.ch> <20200907161712.GF6047@pendragon.ideasonboard.com> <20200907181855.GE2352366@phenom.ffwll.local> <86615b4b1551d4a6f1cfcc13b38e616c@agner.ch> <20200908084855.GH2352366@phenom.ffwll.local> <20200908123304.GG6047@pendragon.ideasonboard.com> User-Agent: Roundcube Webmail/1.4.1 Message-ID: <545fd348c6bd51626cedc0fdcf3afa1d@agner.ch> X-Sender: stefan@agner.ch Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2020-09-08 14:33, Laurent Pinchart wrote: > On Tue, Sep 08, 2020 at 02:29:02PM +0200, Daniel Vetter wrote: >> On Tue, Sep 8, 2020 at 2:07 PM Stefan Agner wrote: >> > On 2020-09-08 10:48, Daniel Vetter wrote: >> >> On Tue, Sep 08, 2020 at 11:18:25AM +0300, Tomi Valkeinen wrote: >> >>> On 08/09/2020 10:55, Stefan Agner wrote: >> >>>> On 2020-09-07 20:18, Daniel Vetter wrote: >> >>>>> On Mon, Sep 07, 2020 at 07:17:12PM +0300, Laurent Pinchart wrote: >> >>>>>> Hi Stefan, >> >>>>>> >> >>>>>> Thank you for the patch. >> >>>>>> >> >>>>>> On Mon, Sep 07, 2020 at 06:03:43PM +0200, Stefan Agner wrote: >> >>>>>>> The lcdif IP does not support a framebuffer pitch (stride) other than >> >>>>>>> the CRTC width. Check for equality and reject the state otherwise. >> >>>>>>> >> >>>>>>> This prevents a distorted picture when using 640x800 and running the >> >>>>>>> Mesa graphics stack. Mesa tires to use a cache aligned stride, which >> >>>>>> >> >>>>>> s/tires/tries/ >> >>>>>> >> >>>>>>> leads at that particular resolution to width != stride. Currently >> >>>>>>> Mesa has no fallback behavior, but rejecting this configuration allows >> >>>>>>> userspace to handle the issue correctly. >> >>>>>> >> >>>>>> I'm increasingly impressed by how featureful this IP core is :-) >> >>>>>> >> >>>>>>> Signed-off-by: Stefan Agner >> >>>>>>> --- >> >>>>>>> drivers/gpu/drm/mxsfb/mxsfb_kms.c | 22 ++++++++++++++++++---- >> >>>>>>> 1 file changed, 18 insertions(+), 4 deletions(-) >> >>>>>>> >> >>>>>>> diff --git a/drivers/gpu/drm/mxsfb/mxsfb_kms.c b/drivers/gpu/drm/mxsfb/mxsfb_kms.c >> >>>>>>> index b721b8b262ce..79aa14027f91 100644 >> >>>>>>> --- a/drivers/gpu/drm/mxsfb/mxsfb_kms.c >> >>>>>>> +++ b/drivers/gpu/drm/mxsfb/mxsfb_kms.c >> >>>>>>> @@ -403,14 +403,28 @@ static int mxsfb_plane_atomic_check(struct drm_plane *plane, >> >>>>>>> { >> >>>>>>> struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(plane->dev); >> >>>>>>> struct drm_crtc_state *crtc_state; >> >>>>>>> + unsigned int pitch; >> >>>>>>> + int ret; >> >>>>>>> >> >>>>>>> crtc_state = drm_atomic_get_new_crtc_state(plane_state->state, >> >>>>>>> &mxsfb->crtc); >> >>>>>>> >> >>>>>>> - return drm_atomic_helper_check_plane_state(plane_state, crtc_state, >> >>>>>>> - DRM_PLANE_HELPER_NO_SCALING, >> >>>>>>> - DRM_PLANE_HELPER_NO_SCALING, >> >>>>>>> - false, true); >> >>>>>>> + ret = drm_atomic_helper_check_plane_state(plane_state, crtc_state, >> >>>>>>> + DRM_PLANE_HELPER_NO_SCALING, >> >>>>>>> + DRM_PLANE_HELPER_NO_SCALING, >> >>>>>>> + false, true); >> >>>>>>> + if (ret || !plane_state->visible) >> >>>>>> >> >>>>>> Would it be more explict to check for !plane_state->fb ? Otherwise I'll >> >>>>>> have to verify that !fb always implies !visible :-) >> >>>>>> >> >>>>>>> + return ret; >> >>>>>>> + >> >>>>>>> + pitch = crtc_state->mode.hdisplay * >> >>>>>>> + plane_state->fb->format->cpp[0]; >> >>>>>> >> >>>>>> This holds on a single line. >> >>>>>> >> >>>>>>> + if (plane_state->fb->pitches[0] != pitch) { >> >>>>>>> + dev_err(plane->dev->dev, >> >>>>>>> + "Invalid pitch: fb and crtc widths must be the same"); >> >>>>>> >> >>>>>> I'd turn this into a dev_dbg(), printing error messages to the kernel >> >>>>>> log in response to user-triggered conditions is a bit too verbose and >> >>>>>> could flood the log. >> >>>>>> >> >>>>>> Wouldn't it be best to catch this issue when creating the framebuffer ? >> >>>>> >> >>>>> Yeah this should be verified at addfb time. We try to validate as early as >> >>>>> possible. >> >>>>> -Daniel >> >>>>> >> >>>> >> >>>> Sounds sensible. From what I can tell fb_create is the proper callback >> >>>> to implement this at addfb time. Will give this a try. >> >>>> >> >>>> FWIW, I got the idea from drivers/gpu/drm/tilcdc/tilcdc_plane.c. Maybe >> >>>> should be moved to addfb there too? >> >>> >> >>> But you don't know the crtc width when creating the framebuffer. >> >> >> >> Hm right this is a different check. What we could check in fb_create for >> >> both is that the logical fb size matches exactly the pitch. That's not >> >> sufficient criteria, but it will at least catch some of them already. >> >> >> >> But yeah we'd need both here. >> > >> > After validating width of framebuffer against pitch, the only thing we >> > need to check here is that the width matches. From what I can tell, >> > least for mxsfb, this should be covered by >> > drm_atomic_helper_check_plane_state's can_position parameter set to >> > false. >> >> This only checks against the src rectangle of the crtc state, there's >> nothing forcing that the size of the fb matches the src rectangle >> exactly. I guess we could maybe add that as another parameter for hw >> like yours or tilcdc. Naming is a bit tricky, maybe >> require_matching_fb or src_must_match_fb or something like that. > > Can we turn those parameters into flags ? false, true, false is hard to > read. > Since it must match, in this case, it would be false, true, true, obviously ;-) I guess this would mean to convert the two existing boolean parameters to flags first, and then introduce a new flag handling fb size vs. CRTC src. Hm, this gets all a bit more involved. It is actually not the issue at hand (in my case the fb width does match the CRTC). Not sure if that case is actually a problem in real world? I can give this a shot still, if preferred. But I would do it independently of the framebuffer pitch validation. -- Stefan >> > So I think in my case I can get away by only checking the framebuffer. >> >> You still need both I think.