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Date:   Tue, 8 Sep 2020 21:30:29 +0200
From:   Borislav Petkov <bp@alien8.de>
To:     Sultan Alsawaf <sultan@kerneltoast.com>
Cc:     "Jason A. Donenfeld" <Jason@zx2c4.com>,
        Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>,
        kitsunyan <kitsunyan@airmail.cc>,
        "Brown, Len" <len.brown@intel.com>, X86 ML <x86@kernel.org>,
        LKML <linux-kernel@vger.kernel.org>,
        Linus Torvalds <torvalds@linux-foundation.org>
Subject: Re: [PATCH] x86/msr: do not warn on writes to OC_MAILBOX
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On Tue, Sep 08, 2020 at 12:18:38PM -0700, Sultan Alsawaf wrote:
> I'd like to point out that on Intel's recent 14nm parts, undervolting
> is not so much for squeezing every last drop of performance out of the
> SoC as it is for necessity.

<snip interesting examples>

Sounds to me that this undervolting functionality should be part of
the kernel and happen automatically. I have no clue, though, whether
people who do it, just get lucky and undervolting doesn't cause any
other hardware issues, or there's a real reason for this power madness
and if not done, power-related failures happen only on some boxes so
they decided to do them on all.

Or maybe BIOS is nuts, which is not a stretch.

Srinivas, what's the story here?

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette