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From:   Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
To:     Shawn Guo <shawnguo@kernel.org>
CC:     "robh+dt@kernel.org" <robh+dt@kernel.org>,
        Varun Sethi <V.Sethi@nxp.com>, Leo Li <leoyang.li@nxp.com>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Ioana Ciornei <ioana.ciornei@nxp.com>,
        Kuldeep Singh <kuldeep.singh@nxp.com>
Subject: RE: [PATCH 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds
 board
Thread-Topic: [PATCH 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds
 board
Thread-Index: AQHWgTuoJIcsrSh3jEy4wdu9ducPKqlZsQ4AgAY8A2A=
Date:   Wed, 9 Sep 2020 07:10:12 +0000
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 <20200905075419.GN9261@dragon>
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> -----Original Message-----
> From: Shawn Guo <shawnguo@kernel.org>
> Sent: Saturday, September 5, 2020 1:24 PM
> To: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> Cc: robh+dt@kernel.org; Varun Sethi <V.Sethi@nxp.com>; Leo Li
> <leoyang.li@nxp.com>; linux-arm-kernel@lists.infradead.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; Ioana Ciornei
> <ioana.ciornei@nxp.com>; Kuldeep Singh <kuldeep.singh@nxp.com>
> Subject: Re: [PATCH 2/2] arm64: dts: lx2160a: add device tree for lx2162a=
qds
> board
>=20
> On Wed, Sep 02, 2020 at 08:43:30PM +0530, meenakshi.aggarwal@nxp.com
> wrote:
> > From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> >
> > Add device tree support for LX2162AQDS board.
> > LX2162A has same die as of LX2160A with different packaging.
> >
> > Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
> > Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
> > Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> > ---
> >  arch/arm64/boot/dts/freescale/Makefile            |   1 +
> >  arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts | 336
> > ++++++++++++++++++++++
> >  2 files changed, 337 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
> >
> > diff --git a/arch/arm64/boot/dts/freescale/Makefile
> > b/arch/arm64/boot/dts/freescale/Makefile
> > index a39f0a1..ab9fbd3 100644
> > --- a/arch/arm64/boot/dts/freescale/Makefile
> > +++ b/arch/arm64/boot/dts/freescale/Makefile
> > @@ -27,6 +27,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) +=3D
> > fsl-lx2160a-clearfog-cx.dtb
> >  dtb-$(CONFIG_ARCH_LAYERSCAPE) +=3D fsl-lx2160a-honeycomb.dtb
> >  dtb-$(CONFIG_ARCH_LAYERSCAPE) +=3D fsl-lx2160a-qds.dtb
> >  dtb-$(CONFIG_ARCH_LAYERSCAPE) +=3D fsl-lx2160a-rdb.dtb
> > +dtb-$(CONFIG_ARCH_LAYERSCAPE) +=3D fsl-lx2162a-qds.dtb
> >
> >  dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-evk.dtb
> >  dtb-$(CONFIG_ARCH_MXC) +=3D imx8mn-evk.dtb diff --git
> > a/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
> > b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
> > new file mode 100644
> > index 0000000..a81c6a4
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
> > @@ -0,0 +1,336 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR MIT) // // Device Tree file
> > +for LX2162AQDS // // Copyright 2020 NXP
> > +
> > +/dts-v1/;
> > +
> > +#include "fsl-lx2160a.dtsi"
> > +
> > +/ {
> > +	model =3D "NXP Layerscape LX2162AQDS";
> > +	compatible =3D "nxp,lx2162a-qds", "fsl,lx2160a";
> > +
> > +	aliases {
> > +		crypto =3D &crypto;
> > +		serial0 =3D &uart0;
> > +	};
> > +
> > +	chosen {
> > +		stdout-path =3D "serial0:115200n8";
> > +	};
> > +
> > +	sb_3v3: regulator-sb3v3 {
> > +		compatible =3D "regulator-fixed";
> > +		regulator-name =3D "MC34717-3.3VSB";
> > +		regulator-min-microvolt =3D <3300000>;
> > +		regulator-max-microvolt =3D <3300000>;
> > +		regulator-boot-on;
> > +		regulator-always-on;
>=20
> I do not see any point to have regulator-boot-on or regulator-always-on f=
or a
> regulator that doesn't have on/off control.
[Meenakshi Aggarwal] Properties are added to specify that platform firmware=
's out of reset configuration enabled the regulator and=20
regulator should never be disabled or change its operative status.

Can you help in understanding why these optional properties cannot be used =
together
>=20
> > +	};
> > +
> > +	mdio-mux-1 {
> > +		compatible =3D "mdio-mux-multiplexer";
> > +		mux-controls =3D <&mux 0>;
> > +		mdio-parent-bus =3D <&emdio1>;
> > +		#address-cells=3D<1>;
> > +		#size-cells =3D <0>;
> > +
> > +		mdio@0 { /* On-board RTL8211F PHY #1 RGMII1*/
> > +			reg =3D <0x00>;
> > +			#address-cells =3D <1>;
> > +			#size-cells =3D <0>;
> > +
> > +			rgmii_phy1: ethernet-phy@1 {
> > +				compatible =3D "ethernet-phy-id001c.c916";
> > +				reg =3D <0x1>;
> > +				eee-broken-1000t;
> > +			};
> > +		};
> > +
> > +		mdio@8 { /* On-board RTL8211F PHY #2 RGMII2*/
>=20
> Missing one space before closing comment.
[Meenakshi Aggarwal] will correct in next version
>=20
> Shawn
>=20
> > +			reg =3D <0x8>;
> > +			#address-cells =3D <1>;
> > +			#size-cells =3D <0>;
> > +
> > +			rgmii_phy2: ethernet-phy@2 {
> > +				compatible =3D "ethernet-phy-id001c.c916";
> > +				reg =3D <0x2>;
> > +				eee-broken-1000t;
> > +			};
> > +		};
> > +
> > +		mdio@18 { /* Slot #1 */
> > +			reg =3D <0x18>;
> > +			#address-cells =3D <1>;
> > +			#size-cells =3D <0>;
> > +		};
> > +
> > +		mdio@19 { /* Slot #2 */
> > +			reg =3D <0x19>;
> > +			#address-cells =3D <1>;
> > +			#size-cells =3D <0>;
> > +		};
> > +
> > +		mdio@1a { /* Slot #3 */
> > +			reg =3D <0x1a>;
> > +			#address-cells =3D <1>;
> > +			#size-cells =3D <0>;
> > +		};
> > +
> > +		mdio@1b { /* Slot #4 */
> > +			reg =3D <0x1b>;
> > +			#address-cells =3D <1>;
> > +			#size-cells =3D <0>;
> > +		};
> > +
> > +		mdio@1c { /* Slot #5 */
> > +			reg =3D <0x1c>;
> > +			#address-cells =3D <1>;
> > +			#size-cells =3D <0>;
> > +		};
> > +
> > +		mdio@1d { /* Slot #6 */
> > +			reg =3D <0x1d>;
> > +			#address-cells =3D <1>;
> > +			#size-cells =3D <0>;
> > +		};
> > +
> > +		mdio@1e { /* Slot #7 */
> > +			reg =3D <0x1e>;
> > +			#address-cells =3D <1>;
> > +			#size-cells =3D <0>;
> > +		};
> > +
> > +		mdio@1f { /* Slot #8 */
> > +			reg =3D <0x1f>;
> > +			#address-cells =3D <1>;
> > +			#size-cells =3D <0>;
> > +		};
> > +	};
> > +
> > +	mdio-mux-2 {
> > +		compatible =3D "mdio-mux-multiplexer";
> > +		mux-controls =3D <&mux 1>;
> > +		mdio-parent-bus =3D <&emdio2>;
> > +		#address-cells=3D<1>;
> > +		#size-cells =3D <0>;
> > +
> > +		mdio@0 { /* Slot #1 (secondary EMI) */
> > +			reg =3D <0x00>;
> > +			#address-cells =3D <1>;
> > +			#size-cells =3D <0>;
> > +		};
> > +
> > +		mdio@1 { /* Slot #2 (secondary EMI) */
> > +			reg =3D <0x01>;
> > +			#address-cells =3D <1>;
> > +			#size-cells =3D <0>;
> > +		};
> > +
> > +		mdio@2 { /* Slot #3 (secondary EMI) */
> > +			reg =3D <0x02>;
> > +			#address-cells =3D <1>;
> > +			#size-cells =3D <0>;
> > +		};
> > +
> > +		mdio@3 { /* Slot #4 (secondary EMI) */
> > +			reg =3D <0x03>;
> > +			#address-cells =3D <1>;
> > +			#size-cells =3D <0>;
> > +		};
> > +
> > +		mdio@4 { /* Slot #5 (secondary EMI) */
> > +			reg =3D <0x04>;
> > +			#address-cells =3D <1>;
> > +			#size-cells =3D <0>;
> > +		};
> > +
> > +		mdio@5 { /* Slot #6 (secondary EMI) */
> > +			reg =3D <0x05>;
> > +			#address-cells =3D <1>;
> > +			#size-cells =3D <0>;
> > +		};
> > +
> > +		mdio@6 { /* Slot #7 (secondary EMI) */
> > +			reg =3D <0x06>;
> > +			#address-cells =3D <1>;
> > +			#size-cells =3D <0>;
> > +		};
> > +
> > +		mdio@7 { /* Slot #8 (secondary EMI) */
> > +			reg =3D <0x07>;
> > +			#address-cells =3D <1>;
> > +			#size-cells =3D <0>;
> > +		};
> > +	};
> > +};
> > +
> > +&crypto {
> > +	status =3D "okay";
> > +};
> > +
> > +&dpmac17 {
> > +	phy-handle =3D <&rgmii_phy1>;
> > +	phy-connection-type =3D "rgmii-id";
> > +};
> > +
> > +&dpmac18 {
> > +	phy-handle =3D <&rgmii_phy2>;
> > +	phy-connection-type =3D "rgmii-id";
> > +};
> > +
> > +&dspi0 {
> > +	status =3D "okay";
> > +
> > +	dflash0: flash@0 {
> > +		#address-cells =3D <1>;
> > +		#size-cells =3D <1>;
> > +		compatible =3D "jedec,spi-nor";
> > +		reg =3D <0>;
> > +		spi-max-frequency =3D <1000000>;
> > +	};
> > +};
> > +
> > +&dspi1 {
> > +	status =3D "okay";
> > +
> > +	dflash1: flash@0 {
> > +		#address-cells =3D <1>;
> > +		#size-cells =3D <1>;
> > +		compatible =3D "jedec,spi-nor";
> > +		reg =3D <0>;
> > +		spi-max-frequency =3D <1000000>;
> > +	};
> > +};
> > +
> > +&dspi2 {
> > +	status =3D "okay";
> > +
> > +	dflash2: flash@0 {
> > +		#address-cells =3D <1>;
> > +		#size-cells =3D <1>;
> > +		compatible =3D "jedec,spi-nor";
> > +		reg =3D <0>;
> > +		spi-max-frequency =3D <1000000>;
> > +	};
> > +};
> > +
> > +&emdio1 {
> > +	status =3D "okay";
> > +};
> > +
> > +&emdio2 {
> > +	status =3D "okay";
> > +};
> > +
> > +&esdhc0 {
> > +	status =3D "okay";
> > +};
> > +
> > +&esdhc1 {
> > +	status =3D "okay";
> > +};
> > +
> > +&fspi {
> > +	status =3D "okay";
> > +
> > +	mt35xu512aba0: flash@0 {
> > +		#address-cells =3D <1>;
> > +		#size-cells =3D <1>;
> > +		compatible =3D "jedec,spi-nor";
> > +		m25p,fast-read;
> > +		spi-max-frequency =3D <50000000>;
> > +		reg =3D <0>;
> > +		spi-rx-bus-width =3D <8>;
> > +		spi-tx-bus-width =3D <8>;
> > +	};
> > +};
> > +
> > +&i2c0 {
> > +	status =3D "okay";
> > +
> > +	fpga@66 {
> > +		compatible =3D "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
> > +			     "simple-mfd";
> > +		reg =3D <0x66>;
> > +
> > +		mux: mux-controller {
> > +			compatible =3D "reg-mux";
> > +			#mux-control-cells =3D <1>;
> > +			mux-reg-masks =3D <0x54 0xf8>, /* 0: reg 0x54, bits 7:3
> */
> > +					<0x54 0x07>; /* 1: reg 0x54, bit 2:0 */
> > +		};
> > +	};
> > +
> > +	i2c-mux@77 {
> > +		compatible =3D "nxp,pca9547";
> > +		reg =3D <0x77>;
> > +		#address-cells =3D <1>;
> > +		#size-cells =3D <0>;
> > +
> > +		i2c@2 {
> > +			#address-cells =3D <1>;
> > +			#size-cells =3D <0>;
> > +			reg =3D <0x2>;
> > +
> > +			power-monitor@40 {
> > +				compatible =3D "ti,ina220";
> > +				reg =3D <0x40>;
> > +				shunt-resistor =3D <500>;
> > +			};
> > +
> > +			power-monitor@41 {
> > +				compatible =3D "ti,ina220";
> > +				reg =3D <0x41>;
> > +				shunt-resistor =3D <1000>;
> > +			};
> > +		};
> > +
> > +		i2c@3 {
> > +			#address-cells =3D <1>;
> > +			#size-cells =3D <0>;
> > +			reg =3D <0x3>;
> > +
> > +			temperature-sensor@4c {
> > +				compatible =3D "nxp,sa56004";
> > +				reg =3D <0x4c>;
> > +				vcc-supply =3D <&sb_3v3>;
> > +			};
> > +
> > +			rtc@51 {
> > +				compatible =3D "nxp,pcf2129";
> > +				reg =3D <0x51>;
> > +			};
> > +		};
> > +	};
> > +};
> > +
> > +&sata0 {
> > +	status =3D "okay";
> > +};
> > +
> > +&sata1 {
> > +	status =3D "okay";
> > +};
> > +
> > +&sata2 {
> > +	status =3D "okay";
> > +};
> > +
> > +&sata3 {
> > +	status =3D "okay";
> > +};
> > +
> > +&uart0 {
> > +	status =3D "okay";
> > +};
> > +
> > +&uart1 {
> > +	status =3D "okay";
> > +};
> > +
> > +&usb0 {
> > +	status =3D "okay";
> > +};
> > --
> > 2.7.4
> >