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Subject: Re: [PATCH v2] arm64: dts: mt8183-kukui: add scp node
To:     Pi-Hsun Shih <pihsun@chromium.org>
Cc:     Rob Herring <robh+dt@kernel.org>,
        Eddie Huang <eddie.huang@mediatek.com>,
        Erin Lo <erin.lo@mediatek.com>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@vger.kernel.org>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-arm-kernel@lists.infradead.org>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-mediatek@lists.infradead.org>,
        open list <linux-kernel@vger.kernel.org>
References: <20200909081422.2412795-1-pihsun@chromium.org>
From:   Matthias Brugger <matthias.bgg@gmail.com>
Message-ID: <dd5a6b8b-71dc-ce54-1f0d-7fa6b1dd6248@gmail.com>
Date:   Wed, 9 Sep 2020 10:57:58 +0200
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On 09/09/2020 10:14, Pi-Hsun Shih wrote:
> Add scp node to mt8183-kukui
> 
> Fixes: 0d5e41709f76 ("arm64: dts: mt8183: add scp node")
> Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org>
> ---
> 
> Change since v1:
> * Add Fixes tag.
> 
> ---
>   .../arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 30 +++++++++++++++++++
>   1 file changed, 30 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi
> index f0a070535b34..85f7c33ba446 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi
> @@ -90,6 +90,18 @@ pp3300_alw: regulator6 {
>   		regulator-max-microvolt = <3300000>;
>   	};
>   
> +	reserved_memory: reserved-memory {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		scp_mem_reserved: scp_mem_region {
> +			compatible = "shared-dma-pool";
> +			reg = <0 0x50000000 0 0x2900000>;
> +			no-map;
> +		};
> +	};
> +

Do we expect other boards to have a different memory reservation? I can see that 
EVB and Kukui uses the same. If not, we should add the node in mt8183.dtsi instead.

Regards,
Matthias

>   	max98357a: codec0 {
>   		compatible = "maxim,max98357a";
>   		sdmode-gpios = <&pio 175 0>;
> @@ -524,6 +536,13 @@ pins_clk {
>   		};
>   	};
>   
> +	scp_pins: scp {
> +		pins_scp_uart {
> +			pinmux = <PINMUX_GPIO110__FUNC_TP_URXD1_AO>,
> +				 <PINMUX_GPIO112__FUNC_TP_UTXD1_AO>;
> +		};
> +	};
> +
>   	spi0_pins: spi0 {
>   		pins_spi{
>   			pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
> @@ -651,6 +670,17 @@ pins_wifi_wakeup {
>   	};
>   };
>   
> +&scp {
> +	status = "okay";
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&scp_pins>;
> +
> +	cros_ec {
> +		compatible = "google,cros-ec-rpmsg";
> +		mtk,rpmsg-name = "cros-ec-rpmsg";
> +	};
> +};
> +
>   &soc_data {
>   	status = "okay";
>   };
>