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From:   Manish Narani <MNARANI@xilinx.com>
To:     Rob Herring <robh@kernel.org>
CC:     "gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
        Michal Simek <michals@xilinx.com>,
        "balbi@kernel.org" <balbi@kernel.org>,
        "p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
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        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        git <git@xilinx.com>
Subject: RE: [PATCH 1/2] dt-bindings: usb: dwc3-xilinx: Add documentation for
 Versal DWC3 Controller
Thread-Topic: [PATCH 1/2] dt-bindings: usb: dwc3-xilinx: Add documentation for
 Versal DWC3 Controller
Thread-Index: AQHWe9j+PlxSy8oZg0WQBIs3MmmIKKlfcVoAgAEWjJA=
Date:   Wed, 9 Sep 2020 15:46:13 +0000
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Hi Rob,

Thanks for the review.

> -----Original Message-----
> From: Rob Herring <robh@kernel.org>
> Sent: Wednesday, September 9, 2020 4:35 AM
> To: Manish Narani <MNARANI@xilinx.com>
> Cc: gregkh@linuxfoundation.org; Michal Simek <michals@xilinx.com>;
> balbi@kernel.org; p.zabel@pengutronix.de; linux-usb@vger.kernel.org;
> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
> kernel@vger.kernel.org; git <git@xilinx.com>
> Subject: Re: [PATCH 1/2] dt-bindings: usb: dwc3-xilinx: Add documentation=
 for
> Versal DWC3 Controller
>=20
> On Thu, Aug 27, 2020 at 12:14:00AM +0530, Manish Narani wrote:
> > Add documentation for Versal DWC3 controller. Add required property
> > 'reg' for the same. Also add optional properties for snps,dwc3.
> >
> > Signed-off-by: Manish Narani <manish.narani@xilinx.com>
> > ---
> >  .../devicetree/bindings/usb/dwc3-xilinx.txt          | 12 +++++++++++-
> >  1 file changed, 11 insertions(+), 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/usb/dwc3-xilinx.txt
> b/Documentation/devicetree/bindings/usb/dwc3-xilinx.txt
> > index 4aae5b2cef56..dd41ed831411 100644
> > --- a/Documentation/devicetree/bindings/usb/dwc3-xilinx.txt
> > +++ b/Documentation/devicetree/bindings/usb/dwc3-xilinx.txt
> > @@ -1,7 +1,8 @@
> >  Xilinx SuperSpeed DWC3 USB SoC controller
> >
> >  Required properties:
> > -- compatible:	Should contain "xlnx,zynqmp-dwc3"
> > +- compatible:	May contain "xlnx,zynqmp-dwc3" or "xlnx,versal-
> dwc3"
> > +- reg:		Base address and length of the register control block
> >  - clocks:	A list of phandles for the clocks listed in clock-names
> >  - clock-names:	Should contain the following:
> >    "bus_clk"	 Master/Core clock, have to be >=3D 125 MHz for SS
> > @@ -13,12 +14,19 @@ Required child node:
> >  A child node must exist to represent the core DWC3 IP block. The name =
of
> >  the node is not important. The content of the node is defined in dwc3.=
txt.
> >
> > +Optional properties for snps,dwc3:
> > +- dma-coherent:	Enable this flag if CCI is enabled in design. Adding t=
his
> > +		flag configures Global SoC bus Configuration Register and
> > +		Xilinx USB 3.0 IP - USB coherency register to enable CCI.
> > +- interrupt-names: This property provides the names of the interrupt i=
ds
> used
>=20
> You have to define what the names are. 'dwc_usb3' seems pretty pointless
> if only 1 name.

OK. I am planning to add more interrupt ids going ahead. For now I will rem=
ove
this interrupt name in v2. The interrupt name will be added along with othe=
r interrupt
names.

Thanks,
Manish