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Date:   Wed, 9 Sep 2020 14:22:51 -0600
From:   Rob Herring <robh@kernel.org>
To:     Arnaud Pouliquen <arnaud.pouliquen@st.com>
Cc:     Alexandre Torgue <alexandre.torgue@st.com>,
        devicetree@vger.kernel.org,
        linux-stm32@st-md-mailman.stormreply.com,
        linux-arm-kernel@lists.infradead.org,
        linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org,
        Fabien Dessenne <fabien.dessenne@st.com>,
        Mathieu Poirier <mathieu.poirier@linaro.org>,
        Ohad Ben-Cohen <ohad@wizery.com>,
        Bjorn Andersson <bjorn.andersson@linaro.org>
Subject: Re: [PATCH 2/3] dt-bindings: remoteproc: stm32_rproc: update for
 firmware synchronization
Message-ID: <20200909202251.GA2975092@bogus>
References: <20200827072101.26588-1-arnaud.pouliquen@st.com>
 <20200827072101.26588-3-arnaud.pouliquen@st.com>
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On Thu, Aug 27, 2020 at 09:21:00AM +0200, Arnaud Pouliquen wrote:
> Add new properties description used to attach to a pre-loaded
> firmware according to the commit 9276536f455b3
> ("remoteproc: stm32: Parse syscon that will manage M4 synchronisation")
> which updates the driver part.
> 
> Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
> ---
>  .../bindings/remoteproc/st,stm32-rproc.yaml   | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml
> index 4ffa25268fcc..e50957d86b1c 100644
> --- a/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml
> +++ b/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml
> @@ -96,6 +96,25 @@ properties:
>          3rd cell: register bitmask for the deep sleep bit
>      maxItems: 1
>  
> +  st,syscfg-m4-state:
> +    $ref: "/schemas/types.yaml#/definitions/phandle-array"
> +    description: |
> +      Reference to the tamp register which exposes the Cortex-M4 state.
> +        1st cell: phandle to syscon block
> +        2nd cell: register offset containing the Cortex-M4 state
> +        3rd cell: register bitmask for the Cortex-M4 state
> +    maxItems: 1
> +
> +  st,syscfg-rsc-tbl:
> +    $ref: "/schemas/types.yaml#/definitions/phandle-array"
> +    description: |
> +      Reference to the tamp register which references the Cortex-M4
> +      resource table address.
> +        1st cell: phandle to syscon block
> +        2nd cell: register offset containing the resource table address
> +        3rd cell: register bitmask for the resource table address
> +    maxItems: 1

Why can't these be implied? You can lookup the tamp syscon by 
compatible.

Please add these to the example.

> +
>    st,auto-boot:
>      $ref: /schemas/types.yaml#/definitions/flag
>      description:
> -- 
> 2.17.1
>