Received: by 2002:a05:6a10:22f:0:0:0:0 with SMTP id 15csp904397pxk; Thu, 10 Sep 2020 01:28:07 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxL3AVIL/RqamzEyoPJO8LR8K3hfI4mCos8dpy8TdTD2dLVVitW8C145smAPjbkRCd75QnN X-Received: by 2002:aa7:d34b:: with SMTP id m11mr8310493edr.178.1599726487193; Thu, 10 Sep 2020 01:28:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599726487; cv=none; d=google.com; s=arc-20160816; b=Q028iMKmUVQ2/8/j3kD3q86WKQfwV2ywUpX4OCXMNYINUM6VntSZvKw2kQkUmv7PV3 glMEROfVDjKENOF9cq2t+xZ49Lcpm1uhlhxU8H0oyPewi7r7Xag6G7IGSj07kDLigDCF xlKC2QwmncU1Hq/OnR9s2XZUvijaJOBIntCPUkRTpRS4lGT+NPoq1P+FB37mEmXxCEoH OOxmqr/tBHjrIuTYF+wCq+kJ6xh4qpZ92RGXRfaVeBm1aoVeEp0XlXpz9uvWmN19aH/l Ugo66LzxWceZx6jHCECox+C9yDM8BMoF1gDKHxC+JO9ZPSK8+lHcDxwocpDQ37lrCzz0 jHPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject; bh=g3T7oExsu/aQtQlzByoyTSBWE8DJ2mTyNJeGtP1lXQ4=; b=l2omoRg1SEJTPOZTaQTxtySAu9vPy4wBwXPzZbS3+QsowBLdRuT02+px+JoyPToi2L ZHFbjQruoZZDajwzHDZdq5z9Era74L+qc5ojuS0p/kUslN3Lb7IhpB6ICrPd1KusDTl2 Puw38hFf0j0igckrQbL0y2oRLIaXljO1ct87u6GtlQmq348+9w/NC8saf9bZq5It4XUV rqnyLOan/gNvof0ZCBqMfv5D+55yaGATihCtBROWTF49pS27d1PZb/aeA1OrWuYK0T+O IQFE1Hzh7VmfEXVai/OdAqElCbDPgTPt4VjxpFMeAnAa0/k7RUp6upEMXnqDa34LaLbm gcww== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id e20si3149343ejq.136.2020.09.10.01.27.44; Thu, 10 Sep 2020 01:28:07 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730277AbgIJI03 (ORCPT + 99 others); Thu, 10 Sep 2020 04:26:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54310 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728709AbgIJIRJ (ORCPT ); Thu, 10 Sep 2020 04:17:09 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D8EF2C061756; Thu, 10 Sep 2020 01:16:59 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id 3E3EF29B5AA Subject: Re: [PATCH 1/2] arm64: dts: mt8173: elm: Set uart0 to mmio32 iotype To: Hsin-Yi Wang Cc: "moderated list:ARM/Mediatek SoC support" , Rob Herring , Matthias Brugger , Devicetree List , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , lkml References: <20200910054635.3337487-1-hsinyi@chromium.org> From: Enric Balletbo i Serra Message-ID: <944325c1-818e-934c-907d-7ff0493446b4@collabora.com> Date: Thu, 10 Sep 2020 10:16:55 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.12.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Hsin-Yi, On 10/9/20 9:57, Hsin-Yi Wang wrote: > On Thu, Sep 10, 2020 at 3:20 PM Enric Balletbo i Serra > wrote: >> >> Hi Hsin-Yi, >> >> On 10/9/20 7:46, Hsin-Yi Wang wrote: >>> Set uart0 iotype to mmio32 to make earlycon work with stdout-path. >>> >>> Signed-off-by: Hsin-Yi Wang >>> --- >>> arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi | 2 ++ >>> 1 file changed, 2 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi >>> index a5a12b2599a4a..d54e62f72c65d 100644 >>> --- a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi >>> +++ b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi >>> @@ -1160,6 +1160,8 @@ &thermal { >>> }; >>> >>> &uart0 { >>> + reg-io-width = <4>; >>> + reg-shift = <2>; >> >> I am wondering if these properties are common enough to go to mt8173.dtsi >> instead of here. >> > Since stdout-path is set on elm.dtsi (using uart0), so I add this > attribute here. > Why needs to be defined in the same place that stdout-path is set? My guess is that reg-io-width and reg-shift are SoC specific, as they define how the IO access to the register is done. In fact, I think that these properties should be added in all the uarts, not only the one that has defined the stdout-path. Cheers, Enric