Received: by 2002:a05:6a10:22f:0:0:0:0 with SMTP id 15csp911319pxk; Thu, 10 Sep 2020 01:44:06 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxgb4TrjIl5valRUGWXnX0ISDzG4DsZlAGuP7U5bLwUiHWDNbhWnb0NRMWH8A11CBIIqnt3 X-Received: by 2002:a50:fb15:: with SMTP id d21mr8536948edq.150.1599727446282; Thu, 10 Sep 2020 01:44:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599727446; cv=none; d=google.com; s=arc-20160816; b=Tj4U3YTv3zkTGk/MFoSWS/YQTsUilQB8wswcjz2dGfLk6RSC4me44o6f262R/6G5V9 XtkNCwgVIwydJ8D+GQcOdNoydUNJPxykko6wvsMdExctEStXBmIeA8QHXcPOMavWg5TJ McQAmls98CGOqzTITXEfxQYPP4B1BUeAQb8YP/t58eDHQDSNsiyKaPTAUqFsktSBxm1S /5gOGFcAdOpO+oBSN0vfq83gXq/peiy9J/Oe1kXBc9wRX0eTNWaKyjse/Ia0N8c59k9o I2/9wG/pjYcwU0q2kBySsVZrqOn600gHzesVOdXBPcsad9SNBCDLYq/+wJ4H6XfhBqAI w6fw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:to:from; bh=4PAFOgKRcg5tcTqdk7nFfPsoDnZL9y7pY+5nthjlsdU=; b=Ak7S37uLFyLx7UEIhM53HoqL81BJUDIZ8HLBN097GxkJ20+59WaBaBTmpc70ZHgglF rcrqnPC8QuvIveWOVT5FT2WM1LH9rFZ+eLXbMmlVyJVY6OwJGqRKnmkAidpKqoAAsbLB ST1JTaIzf8Uv+i75NO0oaX2XBX2leFd1eWh7IaUeUXEPcn8SmEJhVK9vccPcvFncHjMS v4lVkluqKqDGje849iuXknoZvc8FRxqxYBypU/o0mfQ6Qe9PDu29q66Frd2CJVAU5LzC Nq/yoWq5ZxxDBaFufXzt9v9OkcCUtw3HIBTFru2kBxSK4oWpajvOmQ9jJmcZZ4B5+QWO bDmw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j35si3014233edc.541.2020.09.10.01.43.43; Thu, 10 Sep 2020 01:44:06 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729521AbgIJIm6 (ORCPT + 99 others); Thu, 10 Sep 2020 04:42:58 -0400 Received: from mx2.suse.de ([195.135.220.15]:50062 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730270AbgIJIlb (ORCPT ); Thu, 10 Sep 2020 04:41:31 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id D9032B3D9; Thu, 10 Sep 2020 08:41:44 +0000 (UTC) From: Thomas Bogendoerfer To: Joshua Kinard , Alessandro Zummo , Alexandre Belloni , linux-rtc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] rtc: ds1685: Fix bank switching to avoid endless loop Date: Thu, 10 Sep 2020 10:41:24 +0200 Message-Id: <20200910084124.138560-1-tsbogend@alpha.franken.de> X-Mailer: git-send-email 2.16.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ds1685_rtc_begin_data_access() tried to access an extended register before enabling access to it by switching to bank 1. Depending on content in NVRAM this could lead to an endless loop. While at it fix also switch back to bank 0 in ds1685_rtc_end_data_access(). Signed-off-by: Thomas Bogendoerfer --- drivers/rtc/rtc-ds1685.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/rtc/rtc-ds1685.c b/drivers/rtc/rtc-ds1685.c index 56c670af2e50..dfbd7b88b2b9 100644 --- a/drivers/rtc/rtc-ds1685.c +++ b/drivers/rtc/rtc-ds1685.c @@ -193,12 +193,12 @@ ds1685_rtc_begin_data_access(struct ds1685_priv *rtc) rtc->write(rtc, RTC_CTRL_B, (rtc->read(rtc, RTC_CTRL_B) | RTC_CTRL_B_SET)); + /* Switch to Bank 1 */ + ds1685_rtc_switch_to_bank1(rtc); + /* Read Ext Ctrl 4A and check the INCR bit to avoid a lockout. */ while (rtc->read(rtc, RTC_EXT_CTRL_4A) & RTC_CTRL_4A_INCR) cpu_relax(); - - /* Switch to Bank 1 */ - ds1685_rtc_switch_to_bank1(rtc); } /** @@ -213,7 +213,7 @@ static inline void ds1685_rtc_end_data_access(struct ds1685_priv *rtc) { /* Switch back to Bank 0 */ - ds1685_rtc_switch_to_bank1(rtc); + ds1685_rtc_switch_to_bank0(rtc); /* Clear the SET bit in Ctrl B */ rtc->write(rtc, RTC_CTRL_B, -- 2.16.4