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Date:   Sun, 13 Sep 2020 16:59:17 +0100
Message-ID: <87lfhdr7l6.wl-maz@kernel.org>
From:   Marc Zyngier <maz@kernel.org>
To:     Mark-PK Tsai <mark-pk.tsai@mediatek.com>
Cc:     <robh+dt@kernel.org>, <alix.wu@mediatek.com>, <daniel@0x0f.com>,
        <devicetree@vger.kernel.org>, <jason@lakedaemon.net>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>,
        <linux-mediatek@lists.infradead.org>, <matthias.bgg@gmail.com>,
        <tglx@linutronix.de>, <yj.chiang@mediatek.com>
Subject: Re: [PATCH v3 0/2] Add MStar interrupt controller support
In-Reply-To: <20200902063344.1852-1-mark-pk.tsai@mediatek.com>
References: <20200902063344.1852-1-mark-pk.tsai@mediatek.com>
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On Wed, 02 Sep 2020 07:33:42 +0100,
Mark-PK Tsai <mark-pk.tsai@mediatek.com> wrote:
> 
> MStar contain a legacy interrupt controller that routes interrupts
> to the GIC. SigmaStar and Mediatek TV SoCs also have this interrupt
> controller IP.
> 
> Mark-PK Tsai (2):
>   irqchip: irq-mst: Add MStar interrupt controller support
>   dt-bindings: interrupt-controller: Add MStar interrupt controller

Once the binding gets approved, I'll queue this for 5.10.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.