Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
IronPort-SDR: fy/DpuvMftXtu71AJ5gWQHyOUfqMZaKii62RL/ywHJHlCASpSrxWgdQowjr4WErQNVQpv3MP0F
 RIKYFVjwZCMA==
IronPort-SDR: J0uA/flqbUm8o+USs9+TP+wq1sNPIk2NaB/VM2PyKs48FeAWs4JIenbN1q63v1IhsfgfothrgI
 rIVVezEe3ptQ==
From:   Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
To:     kishon@ti.com, vkoul@kernel.org, robh+dt@kernel.org
Cc:     linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
        andriy.shevchenko@linux.intel.com,
        vadivel.muruganx.ramuthevar@linux.intel.com,
        eswara.kota@linux.intel.com,
        lakshmi.bai.raja.subramanian@intel.com,
        wan.ahmad.zainie.wan.mohamad@intel.com
Subject: [PATCH v9 0/3] phy: intel: Add Keem Bay eMMC PHY support
Date:   Mon, 14 Sep 2020 07:55:19 +0800
Message-Id: <20200913235522.4316-1-wan.ahmad.zainie.wan.mohamad@intel.com>
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

Hi.

The first patch is added to rename rename
phy-intel-{combo,emmc}.c to phy-intel-lgm-{combo,emmc}.c.

The second patch is to document DT bindings for Keem Bay eMMC PHY.

The the third is the driver file, loosely based on phy-rockchip-emmc.c
and phy-intel-emmc.c. The latter is not being reused as there are
quite a number of differences i.e. registers offset, supported clock
rates, bitfield to set.

The patch was tested with Keem Bay evaluation module board.

Thank you.

Best regards,
Zainie

Changes since v8:
- Amend Reviewed-by tag to single line.
- Add DT bindings for Keem Bay eMMC PHY into lgm eMMC PHY DT bindings
  document.

Changes since v7:
- Add Reviewed-by tag to 1st (Vadivel) and 3rd patch (Andy).
- In 3rd patch,
  - remove maskval and use FIELD_PREP instead,
  - add <linux/bitfield.h> header,
  - use return dev_err_probe(...) for devm_phy_create(...),
  - rearrange depends on in Kconfig file,

Changes since v6:
- Add new patch to rename phy-intel-{combo,emmc}.c to
  phy-intel-lgm-{combo,emmc}.c.
- Add Reviewed-by: Rob Herring <robh@kernel.org> tag to 2nd patch.
- In 3rd patch,
  - add and use generic helper to update register bits,
  - end module name with .ko in Kconfig help.

Changes since resend v5:
- In keembay_emmc_phy_power(), remove redundant return ret;.

Resend v5:
- Include missing changes done for phy-keembay-emmc.c (See Changes since
  v3)

Changes since v4:
- In Kconfig file, add depends on ARM64 || COMPILE_TEST and
  depends on OF && HAS_IOMEM.
- In Kconfig file, reword the help section to be more verbose.

Changes since v3:
- Exit keembay_emmc_phy_power() with return ret;.
- In keembay_emmc_phy_init(), use PTR_ERR_OR_ZERO(...).
- In keembay_emmc_phy_probe(), devm_regmap_init_mmio(...) in single
  line.

Changes since v2:
- Modify DT example to use single cell for address and size.

Changes since v1:
- Rework phy-keembay-emmc.c to make it similar to phy-intel-emmc.c.
- Use regmap_mmio, and remove reference to intel,syscon.
- Use node name phy@....
- Update license i.e. use dual license.

*** BLURB HERE ***

Wan Ahmad Zainie (3):
  phy: intel: Rename phy-intel to phy-intel-lgm
  dt-bindings: phy: intel: Add Keem Bay eMMC PHY bindings
  phy: intel: Add Keem Bay eMMC PHY support

 .../bindings/phy/intel,lgm-emmc-phy.yaml      |  17 +-
 drivers/phy/intel/Kconfig                     |  22 +-
 drivers/phy/intel/Makefile                    |   5 +-
 drivers/phy/intel/phy-intel-keembay-emmc.c    | 307 ++++++++++++++++++
 ...hy-intel-combo.c => phy-intel-lgm-combo.c} |   0
 ...{phy-intel-emmc.c => phy-intel-lgm-emmc.c} |   0
 6 files changed, 343 insertions(+), 8 deletions(-)
 create mode 100644 drivers/phy/intel/phy-intel-keembay-emmc.c
 rename drivers/phy/intel/{phy-intel-combo.c => phy-intel-lgm-combo.c} (100%)
 rename drivers/phy/intel/{phy-intel-emmc.c => phy-intel-lgm-emmc.c} (100%)

-- 
2.17.1