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[85.73.10.175]) by smtp.gmail.com with ESMTPSA id s11sm21977314wrt.43.2020.09.14.11.36.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Sep 2020 11:36:58 -0700 (PDT) Date: Mon, 14 Sep 2020 21:36:55 +0300 From: Ilias Apalodimas To: Luke Nelson Cc: Xi Wang , Jesper Dangaard Brouer , Will Deacon , bpf , ardb@kernel.org, naresh.kamboju@linaro.org, Jean-Philippe Brucker , Yauheni Kaliuta , Daniel Borkmann , Alexei Starovoitov , Zi Shen Lim , Catalin Marinas , Martin KaFai Lau , Song Liu , Yonghong Song , Andrii Nakryiko , John Fastabend , KP Singh , "David S. Miller" , Jakub Kicinski , Jesper Dangaard Brouer , Networking , linux-arm-kernel@lists.infradead.org, Linux Kernel Mailing List , Anders Roxell , =?iso-8859-1?Q?Bj=F6rn_T=F6pel?= Subject: Re: [PATCH] arm64: bpf: Fix branch offset in JIT Message-ID: <20200914183655.GA22481@apalos.home> References: <20200914122042.GA24441@willie-the-truck> <20200914123504.GA124316@apalos.home> <20200914132350.GA126552@apalos.home> <20200914140114.GG24441@willie-the-truck> <20200914181234.0f1df8ba@carbon> <20200914170205.GA20549@apalos.home> <20200914175516.GA21832@apalos.home> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Luke, On Mon, Sep 14, 2020 at 11:21:58AM -0700, Luke Nelson wrote: > On Mon, Sep 14, 2020 at 11:08 AM Xi Wang wrote: > > I don't think there's some consistent semantics of "offsets" across > > the JITs of different architectures (maybe it's good to clean that > > up). RV64 and RV32 JITs are doing something similar to arm64 with > > respect to offsets. CCing Bj?rn and Luke. > > As I understand it, there are two strategies JITs use to keep track of > the ctx->offset table. > > Some JITs (RV32, RV64, arm32, arm64 currently, x86-32) track the end > of each instruction (e.g., ctx->offset[i] marks the beginning of > instruction i + 1). > This requires care to handle jumps to the first instruction to avoid > using ctx->offset[-1]. The RV32 and RV64 JITs have special handling > for this case, > while the arm32, arm64, and x86-32 JITs appear not to. The arm32 and > x32 probably need to be fixed for the same reason arm64 does. > > The other strategy is for ctx->offset[i] to track the beginning of > instruction i. The x86-64 JIT currently works this way. > This can be easier to use (no need to special case -1) but looks to be > trickier to construct. This patch changes the arm64 JIT to work this > way. > > I don't think either strategy is inherently better, both can be > "correct" as long as the JIT uses ctx->offset in the right way. > This might be a good opportunity to change the JITs to be consistent > about this (especially if the arm32, arm64, and x32 JITs all need to > be fixed anyways). > Having all JITs agree on the meaning of ctx->offset could help future > readers debug / understand the code, and could help to someday verify > the > ctx->offset construction. > > Any thoughts? The common strategy does make a lot of sense and yes, both patches will works assuming the ctx->offset ends up being what the JIT engine expects it to be. As I mentioned earlier we did consider both, but ended up using the later, since as you said, removes the need for handling the special (-1) case. Cheers /Ilias > > - Luke