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From:   Greentime Hu <greentime.hu@sifive.com>
Date:   Tue, 15 Sep 2020 11:58:13 +0800
Message-ID: <CAHCEehKnFpdDamANoOfSJV2pbeMzjhxWja667PL6Sueid9imPw@mail.gmail.com>
Subject: Re: [PATCH] riscv: Add sfence.vma after page table changed
To:     Palmer Dabbelt <palmer@dabbelt.com>
Cc:     Catalin Marinas <catalin.marinas@arm.com>,
        Will Deacon <willdeacon@google.com>,
        Marc Zyngier <maz@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Anup Patel <anup@brainfault.org>,
        linux-riscv <linux-riscv@lists.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Syven Wang <syven.wang@sifive.com>
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Palmer Dabbelt <palmer@dabbelt.com> =E6=96=BC 2020=E5=B9=B48=E6=9C=885=E6=
=97=A5 =E9=80=B1=E4=B8=89 =E4=B8=8A=E5=8D=8810:03=E5=AF=AB=E9=81=93=EF=BC=
=9A
>
> On Mon, 03 Aug 2020 20:29:32 PDT (-0700), anup@brainfault.org wrote:
> > On Tue, Aug 4, 2020 at 8:32 AM Greentime Hu <greentime.hu@sifive.com> w=
rote:
> >>
> >> This patch addes local_flush_tlb_page(addr) to use sfence.vma after th=
e
> >
> > s/addes/adds
> >
> >> page table changed. That address will be used immediately in
> >> memset(nextp, 0, PAGE_SIZE) to cause this issue so we should add the
> >> sfence.vma before we use it.
> >
> > Alternate version of this commit description can be:
> >
> > Invalidate local TLB after both set_pet() and clear_pte() because the
> > address can be used immediately after page table change.
> >
> >> Fixes: f2c17aabc917 ("RISC-V: Implement compile-time fixed mappings")
> >>
> >> Reported-by: Syven Wang <syven.wang@sifive.com>
> >> Signed-off-by: Syven Wang <syven.wang@sifive.com>
> >> Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
> >> ---
> >>  arch/riscv/mm/init.c | 7 +++----
> >>  1 file changed, 3 insertions(+), 4 deletions(-)
> >>
> >> diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
> >> index f4adb3684f3d..29b0f7108054 100644
> >> --- a/arch/riscv/mm/init.c
> >> +++ b/arch/riscv/mm/init.c
> >> @@ -202,12 +202,11 @@ void __set_fixmap(enum fixed_addresses idx, phys=
_addr_t phys, pgprot_t prot)
> >>
> >>         ptep =3D &fixmap_pte[pte_index(addr)];
> >>
> >> -       if (pgprot_val(prot)) {
> >> +       if (pgprot_val(prot))
> >>                 set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
> >> -       } else {
> >> +       else
> >>                 pte_clear(&init_mm, addr, ptep);
> >> -               local_flush_tlb_page(addr);
> >> -       }
> >> +       local_flush_tlb_page(addr);
> >>  }
>
> arm64 appears to be upgrading all set_pte()s on valid kernel mappings to
> include the fence.  It looks like the message from 7f0b1bf04511 ("arm64: =
Fix
> barriers used for page table modifications") is out of date, as I can't f=
ind
> create_mapping() any more.  If that was some generic kernel thing then we
> should probably upgrade ours as well, but if it was arch/arm64/ code then=
 this
> approach seems fine as __set_fixmap() isn't on the hot path -- I guess th=
is is
> fine either way, but there may be other issues that the arm64 approach fi=
xes.
>
> Do you guys happen to remember what was going on here?

Hi Palmer,

Some architectures add cache writeback in set_pte(), just like nds32, csky.

https://github.com/torvalds/linux/blob/master/arch/nds32/include/asm/pgtabl=
e.h#L213
https://github.com/torvalds/linux/blob/master/arch/csky/include/asm/pgtable=
.h#L104

Would you like to pick this patch or should I send another patch to
implement it in set_pte()?