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Date:   Wed, 16 Sep 2020 17:45:38 +0530
From:   Vinod Koul <vkoul@kernel.org>
To:     Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
Cc:     kishon@ti.com, robh+dt@kernel.org, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org, andriy.shevchenko@linux.intel.com,
        vadivel.muruganx.ramuthevar@linux.intel.com,
        eswara.kota@linux.intel.com, lakshmi.bai.raja.subramanian@intel.com
Subject: Re: [PATCH v9 0/3] phy: intel: Add Keem Bay eMMC PHY support
Message-ID: <20200916121538.GJ2968@vkoul-mobl>
References: <20200913235522.4316-1-wan.ahmad.zainie.wan.mohamad@intel.com>
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On 14-09-20, 07:55, Wan Ahmad Zainie wrote:
> Hi.
> 
> The first patch is added to rename rename
> phy-intel-{combo,emmc}.c to phy-intel-lgm-{combo,emmc}.c.
> 
> The second patch is to document DT bindings for Keem Bay eMMC PHY.
> 
> The the third is the driver file, loosely based on phy-rockchip-emmc.c
> and phy-intel-emmc.c. The latter is not being reused as there are
> quite a number of differences i.e. registers offset, supported clock
> rates, bitfield to set.
> 
> The patch was tested with Keem Bay evaluation module board.

Applied all, thanks

-- 
~Vinod